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jpeg压缩中的DCT蝶型算法verilog代码
- jpeg压缩中的DCT蝶型算法verilog代码-jpeg DCT compression algorithm verilog code BUTTERFLY
AES DES verilog代码
- AES DES verilog代码
Sdram_Control_4Port 用verilog写的sdram的控制
- 用verilog写的sdram的控制，进行sdram的读取和写入操作- sdram with the controllor based on verilog
fft
- fft代码,采用蝶形算法,包括C,matlab和verilog代码-fft code, using butterfly algorithm, including C, matlab and Verilog code
LPF
- IIR低通滤波器，matlab与verilog程序完全对应-iir low pass filter matlab result fully match the verilog output.
dft
- verilog语言实在点变换DFT源代码，可以配合软核或者其他CPU进行综合FFT变换，也可以单独使用生成module！-verilog language is point FFT transform source code, can tie in with the soft-core CPU, or other integrated FFT transform, it can be used to generate module!
H.264
- H.264标准解码器全部verilog源码，包括帧内、帧间、变换编码、熵编码、滤波等所有模块-Standard H.264 decoder all verilog source, including intra-, inter-frame, transform coding, entropy coding, filtering all modules
verilog_dct_serial
- Verilog dct + descr iption]-Verilog dct+ descr iption]
MQdecoder
- Verilog HDL 实现的JPEG200的MQ解码-JPEG2000 MQ DECODER BASED ON FPGA， Verilog HDL
wierlesscommunicationfpgadesignmatlabverilogcode.r
- 无线通信FPGA设计的所有源码，具有良好的使用价值-verilog matlab ISE
RFC_1622_CRC16_m
- RFC1662 CRC-16 table generation and CRC checking. Implemented in embedded matlab with scr ipt to test and enable c/c++ code generation. Useful fo check against VHDL/Verilog and other embedded systems to help generate test vectors.
hdl
- 对lvds的结构用verilog和vhdl代码进行了详细的描述-The structure of the lvds with verilog and vhdl code described in detail
asias_dds
- 一个简易的信号源，具有多种波形发生功能还有扫频，调制，频率计等相关功能-My project is on Direct Digital Synthesiser using Verilog HDL.This project is doing by me on july 2009 in summer training at NIT Kurukshetra, India. This DDS system generate the square wave, Triangular wave,Sine wa
delay
- 一个可编程延时，只要输入你想的延时周期就可以延时几个周期-a program delay verilog
fir_filter_verilog
- FIR filter verilog project
LIP6492CORE_zigzag
- Compression ZingZang RTL Verilog source code
LIP6485CORE_vdec_mpeg_prediction
- MPEG Compressor prediction verilog module
DCTPROGRAM.ZIP
- it is verilog code for two dimentional dct
inter_prediction(verilog)
- H.264算法中的帧间估计部分的设计，能够实时处理720x576图像。-The inter predictions part design of H.264,which can process 720x576 image.
cordic算法的Verilog实现
- cordic算法的Verilog实现,代码经过验证，能够有效的运行(Verilog implementation of CORDIC algorithm)