搜索资源列表
Verilog数字系统设计教程(第2版)
- Verilog数字系统设计教程(第2版)”这本书的思考题没有答案，要多做实验和仿真-• Source code of designs in chapters 1 to 8. • Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files. • Several Designs, including SAYEH, that are programmed o
sanfenpin
- verilog 三分频 分频器是FPGA设计中使用频率非常高的基本设计之一，尽管在目前大部分设计中，广泛使用芯片厂家集成的锁相环资源，如altera 的PLL，Xilinx的DLL.来进行时钟的分频，倍频以及相移。-verilog-third of the frequency divider is a FPGA design, very high frequency of use, one of the basic design, although most of the designs in
counter
- This is 2-BCD numbers Counter on board Altera DE2 Code Verilog HDL (You must import DE2_pin_assignments.csv to use this code)
fft
- altera公司fft ip核的运用。语言是verilog.-Altera company s fft ip. Language verilog.
Example-b3-1
- Verilog/VHDL源码的串口示例，“Altera设计基础篇”第3章的串口示例，包括源码和仿真文件等-Verilog/VHDL source serial example, " Altera Design Basics" in Chapter 3 serial examples, including source code and simulation files, etc.
8-example_vga_1
- FPGA的verilog vga简单的测试程序，基于altera-FPGA verilog vga
usb
- Altera usb example verilog file.
fpga
- 有关FPGA的好多资料的综合汇总，包括夏宇闻-Verilog经典教程，Verilog-testbench的写法，Altera+FPGA／CPLD设计高级篇，Altera+FPGA／CPLD设计基础篇等好几本书，超值-A comprehensive summary of a lot of information about FPGA, including Xia Wen-Verilog classic tutorial, Verilog-testbench writing, senior Alte