搜索资源列表
dlx_verilog.rar
- 这是我个人写的DLX处理器流水线的Verilog代码，在ModelSim中仿真通过，并且在ISE中能综合！即可以下载到FPGA中运行指令，指令可以根据需要定义，也可和相应的编译器配合使用，这里给学习流水线和Verilog的朋友共享。,This is my personal wrote DLX pipeline processor Verilog code, adopted in the ModelSim simulation and can be integrated in the ISE! T
Schlib1.~(1).SchLib.Zip
- thu vien fpga cua son
FPGA_RSIC_CPU
- FPGA_RSIC_CPU使用FPGA实现CPU-FPGA_RSIC_CPU
sin-sanj
- 基于FPGA的可调幅度频率的正弦波、三角波、锯齿波、矩形波发生器-FPGA-based adjustable amplitude sine wave frequency, triangle wave, sawtooth, square wave generator
lab4part5
- verilog HDL coding to display hexadecimal on FPGA
calender
- 基于FPGA的电子万年历主程序，只有主程序没有下级模块，望笑纳-FPGA-based electronic calendar main program, only the main program does not subordinate module, look kindly
Ans11-15-(2)
- The GP outputs can be used to control anything remotely your PC might be LEDs on your FPGA board, or a coffee machine with the help of a relay.-The GP outputs can be used to control anything remotely your PC might be LEDs on your FPGA board, or a co
cc
- nexys 4 fpga board design that must include in program-nexys 4 fpga board design that must include in program....
receive-im-by-rs232
- SEND IMAGE DATA TO NIOS II ON FPGA
eetop.cn_I2Cslave
- I2C slave功能模块的一种实现方式，简单易根据自己实际需求做修改，已经过FPGA验证可以很好的工作-An implementation of I2C slave function modules, easy to make changes according to their actual needs, has been verified FPGA can work well ...
dadishu
- 打地鼠基于fpga采用verilog语言编写而成-Playing hamster on fpga using verilog language written in
APB_Servo_code_final
- test code by verilogHDL. SERVO MOTER operation code at FPGA. AHB and APB BUS Architecture.
polar_encoder_1024 (1)
- 该部分的主要功能是完成基于FPGA的polar码编码。(The main function of this part is to complete the FPGA-based polar code coding.)
polar_SC译码
- 该部分的主要功能是完成基于FPGA的polar码SC译码。(The main function of this part is to complete the FPGA-based polar code SC decoding.)