搜索资源列表
dlx_verilog.rar
- 这是我个人写的DLX处理器流水线的Verilog代码，在ModelSim中仿真通过，并且在ISE中能综合！即可以下载到FPGA中运行指令，指令可以根据需要定义，也可和相应的编译器配合使用，这里给学习流水线和Verilog的朋友共享。,This is my personal wrote DLX pipeline processor Verilog code, adopted in the ModelSim simulation and can be integrated in the ISE! T
RS(255-233)decode
- 基于verilog HDL RS(255,223)的编译器源代码-Based on verilog HDL RS (255,223) of the compiler source code
Miller_encode
- 详细介绍了副载波Miller码的编码，采用verilog的编码方式。-Miller introduced the sub-carrier code encoding, the encoding using verilog.
lab3
- only for verilog , this is single cycle code for verilog
mux2to1
- code for multiplexer in verilog
uart1
- this is uart based verilog code for all the beginners
led3
- lcd interface in spartan3e code with verilog domine
cla32
- verilog code for cla 32 bit adder
aes_crypto_core_latest.tar
- AES verilog source code working well very easy to understand!! Enjoy!
dIGITAL-CLOCK
- Verilog code for digital clock
arch_radix4
- Its verilog code for radix -4 cordic-Its verilog code for radix -4 cordic
bin_count
- i m sending hdl code of dm using verilog and vhdl with all blocks contain fft,ifft,scrambler,transmitter,receiver.-i m sending hdl code of ofdm using verilog and vhdl with all blocks contain fft,ifft,scrambler,transmitter,receiver.
sinwave-genertor
- sinwavw generator code in verilog this will helpful for generating a sinave without using a cordic
verilog
- verilog code and test bench
fpga4_123
- Verilog code for traffic light controller and vending machine
wb_i2c.tar
- Verilog code to change BCD format to Binary format-Verilog code to change BCD format to Binary format
LED
- 这是一个流水灯的Verilog代码，非常好，很详细。-This is a useful verilog code
MDL_SLX
- sobel edge detection using verilog code