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lib_trhead_pool
- c封装的线程池库，并且包含简单高效的内存池.代码接口逻辑清晰，且高效稳定-c package thread pool library, and includes a simple and efficient memory pool. code interface logic, clarity, and the highly efficient and stable ...
Parallel-adder
- 并行加法器是一种数位电路，其可进行数字的加法计算。在现代的电脑中，加法器存在于算术逻辑单元（ALU）之中。 加法器可以用来表示各种数值，如：BCD、加三码，主要的加法器是以二进制作运算。-Parallel adder is a digital circuit, which can be calculated the number of addition. In the modern computer, adder exists in the arithmetic logic unit (ALU)
examples
- 分频时序逻辑电路 的设计 书上的题目 自己编写的程序 希望大家共同交流-Divider sequential logic circuits ok hrllo
AGE
- it is program for calculating age and incorporating fuzzy logic
FPGA
- FPGA数字逻辑的设计，对于FPGA设计初学者有很大帮助-FPGA digital logic design, FPGA design for beginners is a great help
changeset_4617
- 在802.11发射机FPGA内核所有的逻辑是主频为160MHz的和20MHz的支持的最大带宽-All logic in the 802.11 transmitter FPGA core is clocked at 160MHz and supports a maximum bandwidth of 20MHz