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JTAGrep
- OPEN-JTAG ARM JTAG 測試原理 1 前言 本篇報告主要介紹ARM JTAG測試的基本原理。基本的內容包括了TAP (TEST ACCESS PORT) 和BOUNDARY-SCAN ARCHITECTURE的介紹，在此基礎上，結合ARM7TDMI詳細介紹了的JTAG測試原理。 2 IEEE Standard 1149.1 - Test Access Port and Boundary-Scan Architecture 從IEEE的JTAG測試標準開始，JTA
AADhods
- 一种面向AADL架构的模型测试方法AADL architecture model oriented test methods-AADL architecture model oriented test methods
ARM_JTAG_debug
- 主要介绍ARM JTAG调试的基本原理。基本的内容包括了TAP (TEST ACCESS PORT) 和BOUNDARY-SCAN ARCHITECTURE的介绍，在此基础上，结合ARM7TDMI详细 介绍了的JTAG调试原理。-ARM JTAG debugger introduces the basic principles. Basic elements include TAP (TEST ACCESS PORT) and BOUNDARY-SCAN ARCHITECTURE in
ARMJTAG
- JTAG+调试原理，中文版。这篇文章主要介绍ARM JTAG调试的基本原理。基本的内容包括了TAP (TEST ACCESS PORT) 和BOUNDARY-SCAN ARCHITECTURE的介绍，在此基础上，结合ARM7TDMI详细介绍了的JTAG调试原理。-JTAG+ debug principle, the Chinese version. This article introduces the basic principles of ARM JTAG debug. Basic elem
Long_shift_gate_level
- 1. Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock ris
DABreceiver
- DAB接收机，包括信道解码的资料。DAB系统中载波频偏估计等。 -The Digital Audio Broadcasting (DAB) system promises to provide CD-quality sounds and flexible data services to mobile, portable and fixed receivers. In order to achieve high quality in multipath environment
Open_Base_System_Architecture_Initiative-Conforma
- Open Base System Architecture Initiative (OBSAI) Conformance Test Specifications
IEEE1ne
- IEEE1641标准的自动测试系统体系结构IEEE1641 standard automatic test system architecture-IEEE1641 standard automatic test system architecture
method
- 通用电路板自动测试系统的软件结构及实现方法-Universal circuit board automatic test system software architecture and implementation method
licat
- 装备综合测试诊断系统体系结构研究及其应用-Diagnostic test equipment integrated system architecture and its application
lpc_blink_switch_cpp_20050429
- This a simple example to let a LED blink and test button-input (GPIO) on a Philips LPC2106 (ARM7TDMI-S-architecture). The demo-board LPC-P2106 from Olimex has been used. The project-setup is adapted for the arm-elf GNU-toolchain on MS-Windows "hosts"
soft
- 软件架构设计--------架构设计阶段的性能测试--------- Software architecture design architecture design phase of the performance test
ruanjianjiagoushishejisixiang
- 这是软件架构师设计思想，不论你是考软件架构师，还是从事软件架构工作或者你是系统分析师，你都需要看看个资料，保证对你有益-This is a software architect design, test whether you are a software architect, was engaged in software architecture work or you are a system analyst, you need to look at a data to ensure th
IEEEXplore(1006)
- vThe paper provides WiMAX BS (base station) MAC design, implementation discussion with performance analysis based on Intel IXP2350, which include MAC design key issues discussion, base station usage model and architecture, MAC hardware and so
PracticalArduino1st
- 创建自己的基于Arduino的设计，获得深入Arduino的架构的知识，并在实际项目中学习友好的Arduino语言，你可以在家自己建立。从使用家庭自动化测试设备各种项目和方法获得经验。-Create your own Arduino-based designs, gain in-depth knowledge of the architecture of Arduino, and learn the user-friendly Arduino language all in the contex
SoftwareBasedonVxWorks
- 首先,对比和分析了弹载计算机软硬件系统的设计方案,在Embest公司的Embest EDUKIT-Ⅲ实验平台上搭建了一个嵌入式开发平台,在Embest公司提供的BSP基础上,开发了弹载计算机软件所需要的板级支持包BSP,并在性能优化上给出了一些分析和改进。其次,根据弹载计算机系统的需求,将VxWorks与Linux做了分析和对比,重点分析VxWorks的实时性能。同时分析和总结ARM的体系结构,从软硬件两方面着眼,分析探讨整个弹载计算机软件系统性能上的优化和平衡。第三,根据系统实时性能的要求和前
register
- test 4-bit register architecture of 4bit register
architecture-course-design
- 组成原理课程设计 编写应用程序，实现以下功能： 通过机器指令集实现两个二进制数的四则运算。数据通过IN指令输入到A累加器中，输入菜单选项选取运算的方式（1：乘法，2：加法，3：减法，4：除法）。 输入形式：数据输入形式为二进制，第一个数据为第一个运算数，第二个数据为第二个运算数，第三个数据为菜单选项。 输出形式：通过实验箱上的out输出端口显示，显示形式为十六进制数。 实现说明： 乘法：通过循环使用加法实现乘法功能，第二个操作数作为被乘数，对其自身累加，当累加等于第一个操
LoadRunner11
- LoadRunner，是一种预测系统行为和性能的负载测试工具。通过以模拟上千万用户实施并发负载及实时性能监测的方式来确认和查找问题，LoadRunner能够对整个企业架构进行测试-LoadRunner, a prediction system behavior and performance load testing tool. Implementation of concurrent load and real-time performance monitoring to simulate t
Lexical-analyzer-test-report
- 是一个词法分析器的实验报告，里面具体说明了整个程序的架构和出现问题如何解决-Lexical analyzer is a lab report, which specifically describes the architecture of the whole process and how to solve problems