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veriprogrammingSpecification
- verilog编程规范，所有的开发员都可以看看，很不错的
true_dual_port_ram_dual_clock
- 双端口ram的verilog程序，经过验证，可编译可用,-dual pot ram
advice-for-VHDLVerilog
- 对于VHDL、Verilog的可综合的代码风格的介绍和对初学者的建议-For VHDL, Verilog code that can be integrated style of presentation and suggestions for beginners
Timer543782102002
- example of some verilog code
MSSE6.5C
- verilog are continue-verilog are continue.....
Verilog-design-experience
- 可编程逻辑基本设计原则,包括组合逻辑电路,时序逻辑电路-Programmable logic basic design principles, including the combinational logic circuits, sequential logic circuit
Digital-Design---An-Embedded-Systems-Approach-Usi
- Digital Design - An Embedded Systems Approach Using Verilog