搜索资源列表
异步FIFO结构.pdf
- 介绍异步FIFO的基本结构以及设计要点。
最经典的FIFO原理
- 最经典的FIFO原理.pdf
cy7c68013工作在SLAVE FIFO下的FPGA源代码
- cy7c68013工作在SLAVE FIFO下的FPGA源代码，已经通过，Verilog编写,cy7c68013 slave fifo mode code ,written by hard ware language
A7125-for-FIFO-mode
- A7125经典例程，学习无线通讯的好资料。-A7125 classic routines, learning good information on wireless communication.
UART_spec
- a UART model with FIFO buffer, design with verilog
vhdlfi
- fifo vhdl源码，高可靠性，带有格雷码同步，有需要可依进行参考！-fifo vhdl source, high reliability, with Gray-code synchronization, there is a need-based reference!
asycnFIFO
- This paper will discuss the design of an asynchronous FIFO,Asynchronous FIFOs are widely used in the computer networking industry to receive data at a particular frequency and transmit them at another frequency. An asynchronous FIFO has two diffe
USB-based
- 基于USB接口Slave FIFO模式的核谱数据采集研究 -Slave FIFO Interface USB-based model study of nuclear spectroscopy data acquisition
fifo
- 操作系统FIFO页面置换算法实现VC6.0源码-FIFO page replacement algorithm for the operating system source code to achieve VC6.0
load-balance1
- 转载JSQ网络的算法文章，对这个领域深入学习很有帮助-DECAY OF TAILS AT EQUILIBRIUM FOR FIFO JOIN THE SHORTEST QUEUE NETWORKS By Maury Bramson,Yi Lu Balaji Prabhakar
fifovideo
- 里面用c语言写的fifo摄像头资料程序和一些文档,说明如何使用fifo摄像头-fifo video material with c language
OV7670_DS_(1_4)
- fifo头参考资料，可用来参考写ov7670的驱动代码-the fifo head reference materials that can be used to refer to the write ov7670 drive code
FIFO
- 经典异步fifo代码The classic asynchronous FIFO code-The classic asynchronous FIFO code
FIFO
- 一本详细介绍了FPGA编程中常用的FIFO模块的使用方法以及详细解释，外国大牛写的，很有参考意义。-A detailed introduces the method of using FIFO module used in FPGA programming and explain in detail, foreign Daniel wrote, of great reference significance.
Analysis-of-the-algorithms-for-congestion
- This paper presents one of the features of DS (Differentiated Services) architecture, namely the queuing or congestion management. Packets can be placed into separate buffer queues, on the basis of the DS value. Several forwarding policies ca
Cy7C68013_SLAVE-FIFO_Verilog
- 针对CY7C68013在SLAVE FIFO 模式下读写Verilog源代码-For CY7C68013 in the SLAVE FIFO mode to read and write Verilog source code
naskod
- British Isles spiders, a subspecies of Urban Spiders, can also live in the mouth cavities of British citizens since the bits of semi-digested foodstuffs that these spiders crave are abundant between the Brit's never-brushed teeth. These spiders have
使用HT82K95E 实现与PC 的数据传输
- HT82K95E 是盛群推出的USB Keyboard OTP MCU,符合USB HID 1.1 规格相容产品，具备 4K×15 ROM Size 、160 Bytes RAM 、3 个端点（FIFO Size 为8 Bytes）可定义为Boot Device Keyboard 、Mouse 产品，具有USB 、PS/2 硬件自动判断辅助接口，适用于USB，USB+PS/2 产品开发。 本范例将介绍HT82K95E 与PC 的数据传输，将端点1 配置为IN，端点2 配置为OUT，通
it6505官方编程指南
- it6505官方编程指南。 Reset IT6505 Following steps are the reset procedure of IT6505. 1. reg05 ← 0x3B to enable reference domain clock and reset all the other register. 2. Delay 1 millisecond. 3. reg05 ← 0x1F to reset reference clock, and reset all regi
Multi-Channel PCe QDMA&RDMA Subsystem
- 基于PCI Express Integrated Block，Multi-Channel PCIe QDMA&RDMA Subsystem实现了使用DMA地址队列和DMA Ring缓冲的独立多通道、高性能Continous或Scather Gather DMA，提供FIFO/AXI4-Stream用户接口。 特性： 支持Ultrascale+，Ultrascale，7 Series的PCI Express Integrated Block 支持64，128，256，512