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RTC
- RTC 实时时钟，主要用于实现长时间计时。模块包括可选8：1 分频器，一个定时器T14，及一个32 位RTC 计数器。本例程介绍RTC的DAVE配置以及KEIL的编程指导-RTC Real Time Clock, mainly used to achieve a long time. Module includes an optional 8:1 divider, a timer T14, and a 32-bit RTC counter. The routine introduction of
DPLL
- 数字锁相环频率合成器的设计,鉴相器、环路滤波器、数控振荡器、反馈分频器-Digital PLL frequency synthesizer, phase detector, loop filter, NCO, feedback divider
Tx
- 主要是8201对音频的一些处理，包括分频和传送-8201 pairs of audio processing, including divider and transmission
verilog_example
- verilog实例，多路器，除法器，数字跑表的多种实现方法-verilog example, the multiplexer, a divider, a digital stopwatch many implementations
CPLD
- 基于lattice的CPLD时钟除频的编程与设计。-Lattice-based CPLD clock divider programming and design。
cpld
- CPLD与电子CAD报告 VHDL中的并行语句、进程 信号、变量、顺序语句 分频器、计数器、译码器、状态机 数字钟综合设计-CPLD and VHDL electronic CAD report in parallel statement, the process signals, variables, sequential statements divider, counter, decoder, an integrated digital clock state machine des