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  1. AssignmentP3

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  2. Assignment 3 Construct VHDL models for 74-139 dual 2-to-4-line decoders using three descr iption styles, i.e., behavioral, dataflow and structural descr iptions. (1) Synthesize and (2) simulate these models respectively in the environment of Xilinx
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-29
    • 文件大小:137.78kb
    • 提供者:魏攸
  1. tp

    0下载:
  2. 此文件是XML文件,是在使用ATML标准时形成的TA,TS,UUT,TI,TD等文件,对于开始学习ATML标准的朋友,应该有一定的帮助!-This file is the XML file, use the ATML standards in the formation of TA, TS, UUT, TI, TD and other documents, for friends to start learning ATML standards, there should be some hel
  3. 所属分类:xml-soap-webservice

    • 发布日期:2017-04-06
    • 文件大小:7.62kb
    • 提供者:lxn
  1. LED-Test-System

    0下载:
  2. 本系统提供统一的测试软件平台,可根据需要快捷的增减测试项目,修改测试规格,更换测试设备。测试数据自动保存在指定的位置,测试数据的格式可根据客户需求定义,默认为csv文本格式。-UUT is tested under test program, test data is saved as txt format.
  3. 所属分类:SCM

    • 发布日期:2017-03-29
    • 文件大小:241.32kb
    • 提供者:Terry
  1. VistaRestoreTools1.0

    0下载:
  2. denoise In BayesShrink[5] we determine the threshold for each subband assuming a Generalized Gaussian Distribution(GGD) . The GGD is given by GG¾ X ¯ (x) = C(¾ X ¯ )exp¡ [® (¾ X ¯ )jxj]¯ (6) ¡ 1 <
  3. 所属分类:matlab

    • 发布日期:2017-05-31
    • 文件大小:13.12mb
    • 提供者:mik
  1. Assignment-3

    0下载:
  2. Assignment 3 Construct VHDL models for 74-139 dual 2-to-4-line decoders using three descr iption styles, i.e., behavioral, dataflow and structural descr iptions. (1) Synthesize and (2) simulate these models respectively in the environment of Xilinx I
  3. 所属分类:software engineering

    • 发布日期:2017-11-13
    • 文件大小:32.8kb
    • 提供者:董振兴
  1. assigment3

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  2. Construct VHDL models for 74-139 dual 2-to-4-line decoders using three descr iption styles, i.e., behavioral, dataflow and structural descr iptions. Synthesize and simulate these models respectively in the environment of Xilinx ISE with the Mod
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-11-17
    • 文件大小:303.03kb
    • 提供者:胡珩
  1. yimaqi_beh

    0下载:
  2. 8位计数器作业中的behavioral描写,没有带testbench,已经通过-1. Construct VHDL models for 74-139 dual 2-to-4-line decoders using three descr iption types, i.e., behavioral, dataflow and structural descr iptions. Synthesize and simulate these models respectively in the en
  3. 所属分类:Other systems

    • 发布日期:2017-04-10
    • 文件大小:767byte
    • 提供者:maria
  1. COMB

    0下载:
  2. We use port map statement to achieve the structural model (components instantiations). The following example shows how to write the program to incorporate multiple components in the design of a more complex circuit. In order to simulate the design, a
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-31
    • 文件大小:820byte
    • 提供者:sam
  1. PWM直流脉宽调速系统建模与仿真

    1下载:
  2. 本文在介绍双闭环PWM直流调速系统原理基础上,根据系统的动、静态性能指标采用工程设计方法设计调节器参数,并运用Matlab的Simulink面向系统电气原理结构图的仿真方法,实现了转速电流双闭环PWM直流调速系统的建模与仿真。(This paper introduces the principle of double closed-loop PWM dc speed regulation system based on the adopted according to the static an
  3. 所属分类:单片机开发

  1. XPT_FCT Software

    2下载:
  2. FCT(功能测试)它指的是对测试目标板(UUT:Unit Under Test)提供模拟的运行环境(激励和负载),使其工作于各种设计状态,从而获取到各个状态的参数来验证UUT的功能好坏的测试方法。简单地说,就是对UUT加载合适的激励,测量输出端响应是否合乎要求。一般专指PCBA的功能测试。(FCT (Functional Testing) refers to a test method that provides a simulated runtime environment (incentiv
  3. 所属分类:LabView编程

    • 发布日期:2020-04-01
    • 文件大小:514kb
    • 提供者:平定繁华
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