搜索资源列表
ADC
- 用verilog编程实现的基于FPGA的AD数据采集程序
FPGA控制AD程序,ADC,DAC转换接口
- FPGA控制AD程序,ADC,DAC转换接口.rar 有限状态机控制AD采样.rar,FPGA control AD procedure
Verilog_ADCtestcode
- ADC测试的verilog代码，可以下载到FPGA上面实现对ADC性能测试。-the test code for ADC of verilog
TCL2543
- 基于FPGA的TLC2543控制器,采用状态进行控制ADC进行转换-The TLC2543 controller based on FPGA, using state control of ADC conversion
ADC_CONTROL_VERYLOG
- 运行在FPGA上的Verilog程序(实现对ADC的控制)-Verilog procedures (the achievement of the control of the ADC)
verilogsigma-deltaadc
- 用verilog编写的sigma-deltaADC的源程序。-code of verilog for sigma delta ADC
ADC
- a verilog code about dac of audio codec on fpga board.
verilogadc0809
- verilog adc0809控制器FPGA实现，编译通过，系统时钟分频，满足ADC时钟要求。-verilog adc0809 controller FPGA, compiler, system clock frequency to meet the requirements of ADC clock.
adc
- 设计ADC控制器，Verilog代码.利用有限状态机设计方法在FPGA上设计ADC0809的接口控制器，采样结果送到数码管显示出来。-ADC controller design, Verilog code using finite state machine design in the FPGA design ADC0809 interface controller, the sampling results to the digital display.
ADC0809
- ADC0809为8位AD,程序为利用FPGA实现ADC0809对于信号的模数转换。-ADC0809 8-bit AD, procedures for the use of FPGA implementation ADC0809 analog to digital conversion for the signal.
ADC-
- it is the document & source code in verilog of adc using sparten 3e fpga kit
Cont_THS1207
- FPGA控制THS1207多通道ADC的verilog源代码-FPGA control THS1207 multi-channel ADC' s verilog source code
Fpga-based-ADC-sampling-voltage-
- 基于fpga的ADC采样电压用，显示在数码管上。verilog语言。-Fpga-based ADC sampling voltage used, displayed on the digital pipe. verilog language.
DE1-verilog
- Altera公司推出最新开发板DE1。该资料为DE1的FPGA 代码，包括ADC，音频处理，视频输出等，供大家参考使用。-Altera Corporation introduced the latest development board DE1. The data for the DE1 FPGA code, including the ADC, audio processing, video output, etc., for your use and reference.
ADC
- verilog At the last, before starting fist go through the FPGA NEXYS2 Board manual. It will be useful for you for this interfacing and also for the future. Best of luck…, try this one because practice makes man perfect. And, yes also if you have a
01_MODEL_FIXED
- FPGA控制时钟以及数据的传输相位调节，可以很方便地进行ADC等高速接口的动态相位调整；(FPGA control clock and data transmission phase adjustment, can be easily carried out ADC and other high-speed interface dynamic phase adjustment;)
ADC_TLC549
- fpga TLC549ADC驱动程序,驱动ADC模块采集电压信息(FPGA Verilog Code for TLC549 Caluc ADC Value)
ADC0804
- 控制ADC0804的verilog 代码，cpld/fpga都可以使用，用数码管显示ADC采集的二进制数据。(Control ADC0804 verilog code, cpld / fpga can be used to display the ADC digital tube with the binary data collected.)
XADC
- xilinx verilog FPGA驱动AD9613 数据采集DEMO程序(Xilinx Verilog FPGA drives AD9613 data acquisition DEMO program.)
test_ADC
- verilog 数模转换程序，包括AD与DA，AD能够对于波形的数值进行输出，使用的是ego1开发板(transition of A/D signal)