搜索资源列表
dlx
- mips pipeline 模以程序，mfc实现的，功能就不用说了把，大家都知道的-MIPS pipeline to die procedures mfc achieve, and functions not have had to put, we all know the
dlx_verilog.rar
- 这是我个人写的DLX处理器流水线的Verilog代码，在ModelSim中仿真通过，并且在ISE中能综合！即可以下载到FPGA中运行指令，指令可以根据需要定义，也可和相应的编译器配合使用，这里给学习流水线和Verilog的朋友共享。,This is my personal wrote DLX pipeline processor Verilog code, adopted in the ModelSim simulation and can be integrated in the ISE! T
dlx
- DLX CPU VHDL CODE UNIVERSITY
Pipeline
- This simulator of DLX architecture designed in C++ along with its documentation. This architecture is originally explained in the book of hennesy & patterson, advanced computer architecture. Here also some program written in assembly language is give
ECE200_LAB4
- Control unit for DLX processor
WinDLX
- DLX模拟器用软件模拟DLX流水线的工作过程，可以灵活、方便地设置参数、控制执行和统计数据，并提供了直观的窗口显示。-DLX simulator software simulation of DLX pipeline work process can be flexible and easy to set up parameters, control, execution and statistical data, and provides an intuitive window display
DLX
- DLX指令集实现程序，将汇编代码转换成二进制代码写入文件中。-DLX instruction set implementation process, the code will be compiled into binary code to write file.
dlx.tar
- A VHDL implementation DLX processor
dlx.tar
- these is about code for dlx processor
dlx
- 一个简单的流水线cpu程序，具有加减乘除，移位等功能。-a simple stream
DLX
- 模拟的汇编器，可对汇编代码进行汇编，然后模拟流水线执行汇编指令-Simulated assembler, assembly code can be compiled, and then simulate pipeline execution assembly instructions
DLX
- DLX 处理器 (发音为 "DeLuXe")是Hennessy 和Patterson合著一书《Computer Architecture - A Quantitative Approach》中流水线处理器的例子。WinDLX是一个基于Windows的模拟器。本教程通过一个实例介绍WinDLX的使用方法。WinDLX模拟器能够演示DLX流水线是如何工作的。-DLX processor (pronounced " DeLuXe" ) is Hennessy and Patterson
DLX
- DLX实现，实用Visual C++编程，思想为MIPS体系结构，可以考察系统仿真的性能和指标-DLX implementation, using Visual C++.
DLX
- DLX用于高效率搜索，是一种覆盖问题模型的算法。DLX利用了双向链表，体现了数据结构的美。-DLX for high efficiency search is an overlay the problem model' s algorithm. DLX utilize a doubly linked list, reflecting the data structure of the United States.
DLX
- DLX算法，是由Knuth提出的一种在图论中图遍历的一种高效算法。-failed to translate
DLX-pipeline-in-verilog
- verilog实现DLX指令集5段流水线-5 stage DLX pipeline implemented in verilog
dlx
- Linux 下DLX 模拟器。可以真实使用-Linux DLX simulator. Can be used in real terms
dlx（gui）
- 模拟DLX处理器，能够读相应的指令并进行运算(simulate CPU for javascrips)
jiexi
- dlx功能实现，基础功能，比如文件的规范化，格式化等一系列的操作(Dlx function implementation, basic functions, such as file standardization, formatting, and a series of operations)
DLXSimulator083.tar
- DLX指令模拟,工作在指令寄存存储器之间，程序课程设计课设作业(dlx kkjj nejdxs jsjj oows kkoo cekjdijd)