搜索资源列表
MyClockTest
- 这是我电子线路测试的作业，在FPGA板上实现数字钟，（Max2环境）采用VHDL语言编写，非常适合初学者。具备24小时计时，校时，低高音整点报时，定时和多重功能选择的功能。-This is my test of electronic circuits operating at the FPGA board digital clock (Max2 Environment) using VHDL language, very suitable for beginners. 24-hour time,
max2
- 最大子矩阵和问题 对于给定的m 行n 列的整数矩阵，编程计算其最大子矩阵和。-matrix and the biggest problem for a given m trip out of the integer n matrix calculation of its programming matrix and the greatest son.
EPM570
- Max2-240/570data sheet
MAX_II_board_schematics
- altera公司max2系列开发板原理图，希望大家喜欢。
Serial.rar
- 基于MAX2运用Quartus实现串口通信,MAX2-based use of Quartus Serial Communication
AVRUSART.rar
- AVR USART程序发送单片机数据到电脑显示，通过max232通讯,Single-chip AVR USART to send data to a computer display, through MAX232 communications
max262.rar
- 通过键盘控制，选择max262不同的工作方式（低通，高通，带通）。用‘+’，‘-’及数字键来控制不同的中心频率，该文件就有详细的正确的C51程序及部分仿真电路。该源代码经过实际验证。,max262--Programmable Filtering
MAX263-MAX268
- D板的数字可编程有源滤波模块设计，MAX26 系列数字编码式滤波器的使用方法-MAX263，MAX264，MAX265，MAX266，MAX267，MAX268
max2
- D/A,max508的調試,可改成鋸齒波輸出或直流輸出,在MOV A,#?語句更改即可-D/A, max508 debugging can be replaced by sawtooth output or DC output, the MOV A,#? Statement can change
SPI_IIC_design_example
- ALTERA原厂提供的例程，网上很难找到的，在MAX2系列芯片上实现过，VHDL和VERILOG两种语言编写 IIC读写程序-ALTERA provided the original routine, it is difficult to find online and in the MAX2 series chip-off, VHDL and VERILOG two languages
CMIdianlu
- 里面包含两个CMI编码电路，用MAX2软件实现-se
max264
- 本文介绍了如何使用264芯片，并对可编程增益可调的滤波器max264做了具体说明.-for how to use max264
max2_test
- MAX2 EPLD 的测试程序, VHDL语言编写.-MAX2 EPLD testing code, VHDL language.
uart232
- 基于FPGA的异步串行通行，用MAX232转化的，利用VHDL语言写的，都已调通，有很大的使用价值！-FPGA-based asynchronous serial passage, with MAX232 conversion using VHDL language written in, have been transferred pass, there is a great value!
Max2
- 解决f(x,y)=(sin(x)/x)*(sin(y)/y)的GA算法-GA algorithm to solve f(x,y)=(sin(x)/x)*(sin(y)/y)
an501_design_example
- 在MAX2系列CPLD上实现脉冲宽度调制(PWM),完整的设计成程序和仿真结果。-In the MAX2 series CPLD to realize pulse width modulation (PWM), a complete design and simulation results into the program.
Proyekton
- Alarm clock vhdl gdf for MAX2+plus
sch
- emp1270 cpld开发板原理图，包括底板和实验板的原理图-emp1270 cpld development board schematics, including the floor and the test board schematic
max2
- maxii里面有MAXII 所有CPLD的引脚封装，功能描述，以及其他的一些功能介绍，是学习CPLD的很不错的资料-MAXII
Max2()
- 遗传算法 java实现，可以根据需要自己改动-Genetic algorithm java implementation, you can change according to need their own