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主芯片：Actel的FPGA030,Verilog语言,串口发送和接收的例程，开发环境：LiberoIDE 8.5,The main chip: Actel' s FPGA030, Verilog language, the serial port to send and receive routines, development environment: LiberoIDE 8.5
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SPI串口的内核实现（分别使用verilog和vhdl语言描述的）,The core of the realization of SPI serial port (using Verilog and VHDL language descr iption of the)
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FPGA与PC串口自动收发程序,verilog源程序,FPGA and the PC serial port automatically sending and receiving process, verilog source code
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verilog 232串口收发程序 在开发板上测试成功过-verilog 232 serial port transceiver program already had some success in the development of on-board test ^ ^
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标准的异步串口通讯设计程序——基于VHDL编程-communication design programme of standard asynchronous serial port base on VHDL programme
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ZigBee无线模块实验.rar；基于FPGA-2C35核心；博创实验箱平台。
在quartusII里面添加uart核，利用串口与主控制机相通信，获取从控制机上传感器的的温度、湿度、光敏电阻、热敏电阻等信息（其中主控制机与从控制机是通过zigbee协议通信）
-ZigBee wireless module experiment rar core on the FPGA-2C35 Borch experimental box platform. Add uart nuclear qua
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语言：verilog语言
功能：通过串口控制模块，实现FPGA与串口 通信。
仿真环境：modelsim
综合环境：quartus -Language: verilog language
function: through the serial port control module, FPGA and serial communication.
Simulation Environment: modelsim integrated environment: quartu
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fpga上的串口驱动程序，包括接收主机来的数据（deserial）和发送由FPGA产生的数据(serial).该程序的调试需要借助串口调试助手-serial port driver on the fpga, including the receiving host to the data (deserial) and send the data generated by the FPGA (serial) to pc. The program needs the serial debug deb
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Verilog硬件描述语言，RS232串口发送接收程序-Verilog hardware descr iption language, RS232 serial port send and receive program
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serial port rs232 in verilog source code
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该程序为RS232串口通信的VERILOG程序，在FPGA上已通过验证，在测试范围内误码率为0-The program for the RS232 serial port communications VERILOG procedures, the FPGA has been validated in the test range of bit error rate is 0
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异步通讯串口调试程序，用VERILOG写的，保证能用-Asynchronous communications serial port debugger, using VERILOG written assurance can be used
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Verilog Serial port
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这是一个uart串口实现16550的实现，代码已测试过了。-This is a 16550 uart serial port, the code has been tested before.
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2D图形加速，里面有串口模块。可以综合，为本人毕业设计。-2D graphics acceleration, which has the serial port module. Can be integrated, as my graduation project.
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自己看了很多材料以后，精心整理的串口通信实验原理和指导，在网上找了很多代码，大部分因为没有很好的注释，看起来很头疼，于是自己写了一份，附带详细的注释，在modelsim仿真器上已经得到验证，现在传上来，仅供参考。-verilog codes for serial port communication
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实现串口通信的verilog代码，简述基本串口通信功能的实现-serial port communication verilog code
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串口通信程序，用于fpga的串口收发，并讲解了串口通信原理。(Serial communication program is used to receive and transmit the serial port of FPGA, and the principle of serial communication is explained.)
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FPGA实现URAT，实现异步串口收发控制(FPGA implements URAT to realize asynchronous serial port and transceiver control)
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基于FPGA与PC串口自收发通信-Verilog(Self-transceiving Communication Based on FPGA and PC Serial Port-Verilog)
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