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ssram.tar
- implemention of ssran in VHDL
leon3-altera-ep2s60-ddr
- This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOT
256X8 SSRAM 建模仿真与综合
- 一篇关于ssram建模仿真的文献
ssram
- 同步静态RAM读写程序，可用作模块，已通过ISE12.4验证-Synchronous Static RAM read and write procedures, can be used as modules, have been verified by ISE12.4
SSRAMcontroller
- SSRAM控制器,vhdl实现并通过验证-ssram controller,implement by vhdl and complier
Memory
- 存储器类型介绍:SSRAM SDRAM Flash Memory EEPROM EPROM-Memory Introduction
AHB_SRRAM
- SSRAM with AHB bus interface source code
ssramWR
- SSRAM CY7C1383C的读写延时控制程序-CY7C1383C delay control procedures to read and write
mem_ctrl
- 老外写的通用的存储器控制核，支持SDRAM SSRAM FLASH,ROM等等 8个片选信号 支持RMW cycles最大可达9*64M Bytes的存储器容量-Written by foreigners universal memory controller core, support for SDRAM SSRAM FLASH, ROM, etc. 8 chip select signals support RMW cycles up to 9* 64M Bytes of memory ca
vga_gui
- 在DE2开发板上实现，由于DE2中的SSRAM只有512K，所以640*480*3（byte）的显存是不够的显示结果是经缩放 后的效果，具体可修改Altera_UP_Avalon_Pixel_Buffer buffer模块中的相关代码。 我把代码移植到DE2-70上后，显示的就很正常了。-In the DE2 development board to achieve, due to the SSRAM DE2 only 512K, so 640* 480* 3 (byte)
71V25761_Verilog_99056.tar
- SSRAM Simulation Model
ssram-and-tesebench
- 实现一个256x8的同步静态存储器SSRAM，用硬件描述语言Verilog写的，同时谢了测试程序-it realized a 256x8 SSRAM,writen by Hardware descr iption language Verilog ,and include the testbench.
ssram
- ssram using VHDL code
demo_MEMtest
- DE2-70 memory 测试 sdram/ssram/flash-based on FPGA DE2-70 memory test
SSRAM-to-NOR-Flash-Bridge
- nor flash（m29w128g）的读，写，擦出等操作，另一边是标准的SSRAM操作接口。--one port is nor flash interface，including the basic operation of nor flash（m29w128g）；the other one is standard ssram interface。
SSRAM_read_Verilog
- SSRAM读写控制说明，很不错，大家可以参考一下，希望有帮助-The SSRAM read and write control instructions, very good
SRAM_Controller
- SSRAM读写控制说明，很不错，大家可以参考一下，希望有帮助-SSRAM read and write control instructions, very good, we can refer to help
SSRAM_design
- SSRAM设计，编译，综合，大家可以参考一下，谢谢大家下载参考-The SSRAM design, compilation, synthesis, we can refer to, thank you download reference
ssram_Controler
- DE2-70开发板上的SSRAM的读取数据控制器，通过拨码可以实现读取数据。-DE2-70 development board SSRAM read data controller, through DIP can read data.
DE2_70_NIOS_10_flash
- 首先将此Verilog程序下载到DE2-70开发板上后，然后用NiosII软件将任何文件的二进制数据写入到ssram或者sdram等存储器重去，并可以指定起始地址。-First program this Verilog downloaded to the DE2-70 development board, and then the use NiosII software binary data of any file written to memory such as ssram or sdra