资源列表
Hypnosis
- 这是关于java中运用其中的图形API和线程实现的简单的2d图形应用 -This is the use of java on the graphics API and threads to achieve a simple 2d graphics
test
- arm lpc urat0-urat1通信程序
32×32dot-matrix_progr
- 32 * 32 dot-matrix program, set up the typewriter font size type 32 * 32 dot-matrix program, set up the typewriter font size type
mcfsqdsp3
- 一种脉冲发生器的实现，可用于PWM控制中-The realization of a pulse generator can be used for PWM control
dual_RAM
- vhdl语言编写的双口ram及testbench,模块可以在modelsim里进行时序和功能仿真。-vhdl language of the dual-port ram, and testbench, modules, conducted in the modelsim timing and functional simulation.
CONVOLUTIONAL_INTERLEAVER
- DVB数据交织,交织深度I=12,已得到应用!-DVB data interleaving, interleaving depth I = 12, has been applied!
test_dec1
- This Module creates the test Bench for AES Decryption Algorithm
zhixianchabu
- 直线插补程序 直线插补程序 直线插补程序-Linear interpolation Linear interpolation procedures procedures procedures for linear interpolation procedure for linear interpolation of linear interpolation procedure
LCD12864
- C51 LCD12864驱动函数，已经模块化
Ptxd
- 模拟RS-232串口产生周期串口数据，可以根据需要修改周期参数，及时钟参数，代码可以直接用来产生需要波特率的通讯模拟数据。-Analog RS-232 serial port generates cycle serial data, based on the need to modify the cycle parameters, and clock parameters, the code can be directly used to generate analog data communi
iicslave
- iic代码 这个是作为从机是接受数据是没有问题的 我已经验证过是可以用的额 -iic this communication code fpga have a slave ,the code test ok
min-sel
- 用来找到输入数据中的最小值和第二小值得verilog源码，可仿真-Used to find the minimum value of the input data and the second small worth verilog source code, can be emulated