资源列表
18_uart
- FPGA串口通信，可以实现高速通讯，具有良好的模块说明-FPGA serial communication
am
- 基于FPGA的用verilog语言写的，改程序可产生不同调制系数和不同频率的AM波，长按按键切换调制度25 、50 、75 和短按按键切换调制信号频率1k、1.5k、2k、2.5k.-Based on the FPGA using verilog language, change the program can produce different coefficients and different frequency modulated AM wave, long press the butt
DDS_TLC5620
- DDS函数信号发生器 tlc5620 verilog-dds tlc5620 verilog
dividor-design
- 本程序实现了快速除法运算，程序设计简单实用，方便移植-this is a Division
Fpga-based-ADC-sampling-voltage-
- 基于fpga的ADC采样电压用，显示在数码管上。verilog语言。-Fpga-based ADC sampling voltage used, displayed on the digital pipe. verilog language.
dsp_core_tx_filter
- 应用在USRP N210上的XIlinx的FPGA开发板上面的变采样滤波器，实现25--30.72M的变采样滤波器，适应LTE物理层的要求-Application on the USRP N210 FPGA development board above XIlinx variable sampling filter, to achieve 25- 30.72M variable sampling filter, adapt LTE physical layer requirements
Cyclone4_SD_Card_Audio_Player
- 基于cyclone4 FPGA芯片的音频播放器完成项目工程，包括SOPC项目代码，以及SD卡读取模块Verilog IP，以及完整的Q2下项目工程。-Cyclone4 FPGA chip based audio player to complete the project works, including the SOPC project code, and SD card reader module IP, as well as complete Q2 next project.
tongxin485
- 关于Verilog语言学习-485通信程序-Verilog on language learning-485 communication program
TLV-5626
- DA转换芯片TLV5626的驱动程序，调试通过-DA zhuanhuanxinpian TLV5626 dequdongchengxu ,tiaoshitongguo
pingball
- 用verilog写得弹珠小游戏，在BASYS平台上运行的-Pinball game with verilog written, running on a platform in BASYS
ddr3_mcb1
- 基于SPARTAN 6 的DDR3的实现。-The Verilog code for DDR3 on the SPARTAN 6
man2uart_latest.tar
- fpga uart串口ip核，源代码例程。-fpga uart ip core