资源列表
ztj
- max+plusII下的使用列举类型的状态机-max plusII use of the listed types of state machine.
VGA_Controller
- 在AlTEA的DE2平台上用VerilogHDL实现的VGA控制模块-AlTEA in the DE2 platform with VerilogHDL achieve VGA Control Module
lcd
- source code for ds1307 interfaced to 89c61x2 keil uvision
Full_adder
- 全加器的VHDL逻辑编程，外加两个全功能，这个过程有些简单，但可能有一些初学者的帮助。-Full adder VHDL logic programming, plus two full-function, this process some simple, but there may be some beginners help.
ChkRpm
- Motor RPM checking source code
sumador_divisor
- suma dos señ ales y las divide entre 2
Clock-DS1302LCD
- 该文件实现用DS1302来实现日历和时钟功能，液晶1602上显示出来。-The file with the DS1302 to the calendar and clock functions, displayed on the LCD 1602.
trivium
- trivium密码算法的 verilog 实现 测试正确-trivium password algorithm verilog test correct
DS1307_avr
- Real-time clock (RTC) counts seconds, minutes, hours, date of the month, month, day of the week, and year with leap-year compensation valid up to 2100. Source code for Atmel AVR chip.
CRC-CheckSum
- 校验和处理，用RealView 3.0+编译，必须使用ARM方式编译-Check and treatment, compiled with RealView 3.0+, you must use the ARM method to compile
DBounce
- Using mechanical switches for a user interface is a ubiquitous practice. However, when these switches are actuated, the contacts often rebound, or bounce, off one another before settling into a stable state. Several methods exist to deal with this te
mux
- 使用VERILOG實現多工器之設計,並附上tb供測試-VERILOG realized using multiplexer design, along with tb for testing