资源列表
SPI_Att7022.rar
- ATT7022计量芯片的通讯程序，已经使用于实际生产中，应用于单相和多相电量表中,ATT7022
buttonworld
- minigui控件编程，用来改变按钮显示字体的例子。
SHANGUANGDENG
- EM78P153的源程序，P5.1和P5.2接上LED,按键（P6.0)就可以使LED交替闪烁，同时闪三下，停一秒，有闪光灯的效果哦！
alu
- verilog编写的alu模块-Verilog modules prepared by the ALU
unishift
- An universal shift register performs the following tasks load, right shift ,left shift and parallel load as the selection inputs are 00,01,10,11 respectively. Such a register is implemented here in Quartus.
i2c_wreg
- i2c 功能写操作源代码，供大家参考一下，软件上已经编译OK-i2c write function of the source code for your reference, the software has been compiled OK
frequency-divider
- anything frequency divider-frequency divider
key-pad-interfacing-to-8051
- key pad interfacing to 8051
uart
- Verilog 编写全双工UART input clk, // 这个模块的主时钟 input rst, // 同步复位信号 input rx, // 串口接收端口 output tx, // 串口发射端口 input transmit, // 发送信号 input [7:0] tx_byte, // 发送的字节 output received, // 表明，已接受到一个字节 output [7:0] rx_
ditong
- DSP写的低通滤波，每60个数去一下平均数，前面加一个数后面减一个数，总是60个数的平均值，验证好用。-DSP write low-pass filter, go to the average number of every 60, preceded by a number less behind a number, the average number is always 60, verification use.
Verilog-code-for-finding-GCD
- State machine implemented in verilog to find GCD of two 8 bit numbers. Two files are included (module and its testbench)
Read_SPI_ADC
- This VHDL code takes a clock, reset, Capture_EN and SPI data LT2315 ADC and generates SPI_CLK and SPI_nCS of it and reads 12-bit serial data ADC and returns 12-bit parallel data.-This VHDL code takes a clock, reset, Capture_EN and SPI data LT2315 AD