资源列表
flash.zip
- 对am29f040的flash的操作,The flash of am29f040 operation
SpiralMatrix1
- 螺旋矩阵算法编程，沿各个矩形边框依次给矩阵的每一个元素赋值，在计算机内存中构造一个完整的螺旋矩阵，然后输出。-Spiral Matrix Algorithm for programming, along the border each rectangle in turn give the matrix elements of each assignment, in the computer memory to construct a complete spiral matrix, then ou
music0
- 单片机发声《五月桂花香》，蜂鸣器试验，感受单片机的音乐
checkid.rar
- 身份证合法性判断，二代身份证合法性判断 ,ID card to determine the legitimacy, the legitimacy of the second generation ID card to determine
c21_pn_code_generator
- 精通verilog HDL语言编程源码之7——伪随机序列应用设计-Proficient in programming language source verilog HDL of 7- the application of pseudo-random sequence design
shiftregister
- Shift Register. VHDL code and its testbench.
ad_da_test
- 基于SOPC EP2C5开发板的I2C总线的A/D D/A例程-A/D AND D/A routings interfaced with i2c based on sopc ep2c5
ps2
- FPGA实现ps2键盘控制，sparden 3s 250e-FPGA realization of ps2 keyboard, sparden 3s 250e
bis
- 这是个并串转换的程序，用vhdl编写，希望对大家有用。-This is a string and the conversion process, using vhdl write, want to be useful.
time
- 在doc下运行的秒表系统！自动跳数字！按相应的键可以开始，停止-The stopwatch is running in the doc! Digital automatic jump! You can start, stop, press the appropriate key
DIV
- 最新修改 veilog 除法器，32位除16位，输出数据锁存-//divider dividend divisor* quotient+ remainder //dividend 32 bit //divisor 16 bit //quotient 32 bit //remainder 32 bit //need 32 clk to finish the calculation //start 1 start the calculation //s
axi lite 接口
- 该文件完成了简单的axi lite 接口协议 Verilog 语言编程。欢迎交流讨论