资源列表
logic
- Verilog descr iption for cell logic
adder16_2
- 两个16位的二进制数相加，分别是高位和高位相加，低位和低位相加。-Two 16-bit binary numbers together, were added to high and high, low and low sum.
fsk
- 用Verilog语言在FPGA上实现FFT算法-With Verilog language FPGA to realize FFT algorithm
liushuiseng
- 基于51单片机流水灯从上到下流再由下到上流最后闪五次-Based on 51 single-chip light water flows from top to bottom and then from five down to the high end flash
daima
- MCS-51控制数码管显示代码,能够动态显示数字，这里只是举例，数字可以自己修改。-MCS-51 control the digital display code.Be able to display figures, there is only an example,you can change the figures.
TimerTest
- 一个简单的定时器。定时执行打印信息。每隔5秒钟打印一次。-A simple timer. Regular print information. Every 5 seconds to print.
lesson_8
- 在51单片机中用1602液晶显示屏显示一些数据，如日期名字等-In MCS-51 using 1602 LCD screen to display some data, such as the date of the name
Text1
- PWM控制,运用软件延时，控制占空比大小，可以运用到控制舵机上，也可控制直流电机-PWM control, the use of software delay, control the duty cycle size, can be applied to control the steering, but also can control the DC motor
binary2bcd
- binary to bcd code converter design using verilog
button-is-pressed
- 关于判别电源按钮是否按下的代码，自己罗列了所用到的3种方式，均好用-the code is for discriminating the power button is pressed
Stepper-motor-speed
- 步进电机控制模块主要包括步进电机调速控制，该模块实现步进电机可由外置拨码开关来控制电机转速。-Stepper motor control module comprises a stepper motor speed control, the stepper motor module by external DIP switches to control the motor spe
code
- 设计89C2051来实现定时自动断电重启功能。-reset auto