资源列表
DLF
- 可增可减的计数器，可以用于全数字锁相环中的环路低通滤波器-Either upwards or downwards counter low-pass filter can be used for all-digital phase-locked loop in the loop
CycloneIII_EP3C40F780C8_8_UART
- SOPC,CycloneIII系列芯片EP3C40F780C8，NIOS II IDE,UART 实验代码-SOPC,CycloneIII，EP3C40F780C8，UART code
4fsk-Verilog-HDL
- 基于Verilog HSL的4psk调制解调-very nice
MPPT_PV_12V_FPGA5
- 基于fpga的mppt（最大功率跟踪）无差拍设计-Fpga-based mppt deadbeat designs. . .
fft256_512_1024
- 基于基2的并行256，1024深度的FFT源代码verilog-Based on radix-2 FFT parallel 256,1024 depth verilog source code
RGB0808
- RGB0808矩阵FPGA代码（Verilog HDL语言）-RGB0808 matrix FPGA code (Verilog HDL language)
VGA_FPGA_v8_08
- VGA0808矩阵FPGA代码（Verilog HDL语言）-VGA0808 matrix FPGA code (Verilog HDL language)
led-water
- 流水灯程序，时钟频率为50MHz，控制四个led向同一个方向移动，如流水一样。没建个0.5s点亮一个灯，使灯亮朝一个方向移动-Water lights, clock frequency of 50MHz, control four led moving in the same direction, like water, like. Did not build a 0.5s lit a lamp, the lamp lights move in one direction
UartSend
- FPGA Verilog HDL 语言构建串口数据发送器的详细方案设计-FPGA Verilog HDL language construct serial data transmitter detailed program design
9280-
- 基于FPGA的AD9820芯片转换程序,采用verilog编写,成功通过仿真-The AD9820 chip FPGA-based conversion process, using verilog prepared successfully through the simulation
CH372
- 基于fpga的USB控制器，采用CH376芯片，verilog代码编写，通过仿真-Fpga-based USB controller, using CH376 chip, verilog code prepared by simulation
gamefinal_11998
- 基于FPGA 的打地鼠游戏的设计。在xilinx上运行。-FPGA-based play hamster game design. In xilinx run.