资源列表
USB_SLAVE_700AN
- 基于verilog的USB2.0同步写操作代码-usb2.0syn write code
device_test
- a example of vhdl for epm240
vhdl
- 实现8421BCD码转换为5421BCD码求和运算-Achieve 8421BCD code into 5421BCD code summations
NetValueInd_v1
- MT4 Net value indicator
spi
- spi slave verilog代码 spi slave verilog代码 spi slave verilog代码-spi slave verilog code spi slave verilog code spi slave verilog code
binDCT
- 一种快速离散余弦变换硬件实现，对于初学者很有用-A fast discrete cosine transform implementation by using verilog
LED
- 简单的流水灯设计，四个灯轮流闪，测试通过-led test， shift
downcnt
- 倒数计数器，用于各种乘法器的应用，或者其他应用当中-countdown counter, the multiplier used for various applications, or other applications which
Audio_Bit_Counter
- The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu
bcd2bin_n
- This decoder binary to Binary Coded Decimal. Im tested on s3e-This is decoder binary to Binary Coded Decimal. Im tested on s3e
ControlCharacterGeneration
- The Control Character Generator generates the characters like ‘Start’, ‘End’, ‘Idle’. The control characters are added to the actual frames that are transmitted. The ‘Start’ character is appended before starting of frames and the character ‘End’ is a
uart_rx
- uart通信方式的接受模块，在串口通信uart中，需要记录来自外设的数据，进行采集和时序控制，进行异步的传输。-acceptance uart communication module, serial communication uart need to record data from peripherals, acquisition and timing control, asynchronous transmission.