资源列表
Verilog-HDL-digital-system-design
- Verilog HDL数字系统设计教程,其中对Verilog HDL语言的语法，FPGA的结构及其应用作了详细的讲解-Verilog HDL digital system design introduces the Verilog HDL language and the FPGA function including syntax ,FPGA frame and application and so on
uart-of-fpga
- FPGA实现UART通信程序，verilog hdl语言实现的，好用-UART of FPGA
geleima--10
- 格雷码计数器 vhdL实现 quartus编译通过-Gray code counter VHDL quartus compiled by
CIC-UPSAMPLE
- CIC内插 内插系数可变，阶数1~6,Verilog版本-Inserted within the CIC interpolation factor variable, the order of 1 to 6, the Verilog version
4613m73a_nand_model
- File Descr iptions: --- --- --- nand_model.v -structural wrapper for nand_die_model nand_die_model.v -nand model of a single die nand_defines.vh -file used to generate correct port maps for nand_model instanciation. nand_parameters.vh -fi
rom
- 此包里有两个程序，其一为ROM存储器，其二为8位加法器-This bag has two programs, one for the ROM memory, and the second 8-bit adder
screw
- 基于FPGA的串行数据加解扰代码，用VHDL实现，可跑400M的速度。-FPGA-based serial data plus descrambling code using VHDL, and can run 400M speed.
test
- 利用VHDL 编程AD9910 产生DDS -Use of the VHDL programming AD9910 DDS
count_zj
- 基于FPGA的数字锁相环中环路滤波器的设计-FPGA digital PLL loop filter design
MCP4822
- SPI recever avr programing
MANCHESTER-ENCODING
- manchester encoding 波形-software for manchester encoding
digital-signal-processing-with--fpga
- 数字信号处理用FPGA实现，其中包含常见的FFT，滤波器，自相关等用VHDL和Verilog语言实现的-digital signal processing with fpga