资源列表
Cymometer
- Verilog 编写的频率计，使用8位LED作为显示，Quartus II 6.0的工程文件。保证好用，EPM240T的芯片。使用了66 的资源。-Written in Verilog frequency counter, using 8-bit LED as the display, Quartus II 6.0 of the project file. To ensure easy to use, EPM240T chips. 66 of the resources used.
12
- 用FPGA进行等精度频率和相位差测量的程序，本程序是在EPEC6Q240C8下的程序-Carried out with the FPGA such as the frequency and phase measurement precision of the procedure, this procedure was the procedure under the EPEC6Q240C8
tlc2543AND11channel
- 11路串行AD采集芯片TLC2543，12BIT精度输出，100Khz，采用VERILOG HDL编写，占用200个LE-11-Channel Serial AD acquisition chip TLC2543, 12BIT accuracy of the output, 100Khz, using VERILOG HDL preparation, taking up 200 LE
UP_IP_Library_80
- altera大学IP库，包含ps2、sdram、rs232等-altera University, IP libraries, including the ps2, sdram, rs232, etc.
camera_len_con
- 一个摄像机镜头远程控制C程序，采用PELCO-D和PELCO-P自动识别协议，通信速率：1200/2400/4800/9600四种，镜头反持类型：直流和止进两种，通过P1.0选择，当前使用的CPU型号为STC12C5201系列-A camera lens remote control C program, using PELCO-D and PELCO-P automatic recognition agreement, the lens counter-holding types: DC an
I2C
- iic verilog 从机程序 包含iic Verilog的主模块，控制模块和io寄存器模块-iic Verilog slave
255
- 全数字锁相环的Verilog源代码，经过仿真调试-All-digital PLL Verilog source code, through the simulation to debug
arm9_fpga2_verilog
- ARM9的开发源代码，全套，很难得。现全部共享。 -ARM9 development of source code, complete, very rare. Are all shared.
qpsk_module
- 采用Verilog语言编写了一个qpsk调制的程序-Verilog language using a modulation process qpsk
hdlc
- HDLC协议控制器，用FPGA实现的verilog源代码-HDLC protocol controller, implemented with FPGA verilog source code
fsk
- 过零检测法设计了一种FSK数字解调器，实现了对FSK数字调制信号的解调，达到了解调的目的-Zero-crossing detection method designed a digital FSK demodulator is realized on the demodulation of FSK digital modulation signals, to understand the purpose of transfer
1553B
- 1553协议控制， 1553协议控制-1553协议控制