资源列表
Advanced_Digital_Design_with_the_Verilog
- Verilog 语言的高级数字系统设计，原版书籍，很全面-Verilog language, advanced digital system design, original books, very comprehensive
Zircon_Example
- 对于初学者很有用的fpga编程实例，帮助初学者少走武宁路(Very useful for beginners FPGA programming examples, to help beginners less Wuning Road)
Digital-Design-with-CPLD-Part2
- Digital Design with CPLD Part2 PDF document with examples
digital
- 原创-verilog数字钟-基于quartus-显示时分秒-整点报时-设置时段不报时-欢迎下载-Original-Verilog digital clock-based on quartus- Displays minutes and seconds- the whole point of time- set time period does not chime- Welcome to download
ddr3control
- 8位突发长度，一次64bit数据读写，MIG核(DDR3 controll implimention)
dso
- 用FPGA设计的数字示波器，有详细的设计过程、论文和硬件原理图-Digital oscilloscope with the FPGA design, detailed design process, paper and hardware schematics
EDA
- EDA 的课件，是潘松老师编的那本书，希望对读者有用-EDA courseware, is the book compiled by teachers Pan Song, I hope useful to readers
高级FPGA设计 结构、实现和优化
- 高级FPGA设计 结构、实现和优化,电子书，对FPGA学习有帮助-Advanced FPGA design structure, implementation, and optimization, e-books, learning on FPGA help
TSE
- 利用SOPC Builder搭建三速率以太网基本构架，完成以太网功能。-SOPC Builder using the basic framework set up three speed Ethernet, Ethernet function to complete.
get-start-with-modulesim
- 内含基于altera公司的FPGA芯片用modulesim仿真步骤，和详细实例，教会怎么使用modulesim仿真和编写testbench程序。-Altera FPGA-based embedded chip company with modulesim simulation steps, and detailed examples, how to use the church modulesim testbench simulation and preparation procedures.
Digital-Design-with-CPLD-Part3
- Digital Design with CPLD Part3 PDF document with examples
VHDL-Resources
- 编写VHDL程序与之相关的资源调用与特色电路设计方法，资料中提供了许多案例帮助用户熟练使用VHDL语言设计电路-Write VHDL program associated transfer of resources and characteristics of the circuit design method, the information provided in many cases to help users familiar with the VHDL language circuit