资源列表
pps_ketiao_rb2
- FPGA程序,使用Verilog语言生成1个脉冲可调的PPS脉冲信号。(FPGA program generates 1 PPS pulse signal, using Verilog language.)
ORCAD-PSpice
- ORCAD PSpice全能中文图示(仿真)教程-ORCAD PSpice versatile Chinese icon (simulation) tutorial
bldc
- pid controller implementation of bldc motor on fpga
E4CE40_TV_PAL
- Altera E4CE40 TV PAL制式 源码-Altera E4CE40 TV PAL standard source
5.4_AudioFilter
- 基于SystemGenerator的音频滤波器，实现后可以在SPARTAN6中运行。-Based on the audio SystemGenerator filter implemented in SPARTAN6 run.
VGA_VRAM
- 使用PS2鼠标与VGA接口接显示器实现画图板的功能-Interface with PS2 mouse and VGA monitor connected to achieve the function of drawing board
NIOS_seddisplay
- NIOS七段数码管显示系统设计，包括完整的硬件合软件设计-NIOS Seven-Segment LED Display System Design
de2.1
- 这是一个基于FPGA/SOPC设计的简单串口程序，是FPGA硬件和niosII软件编程的结合。对初学者有很大的借鉴意义。在Quartus6.1和niosII6.1环境下编译通过，并且下载到板子上运行成功-This is based on FPGA/SOPC design a simple serial program is FPGA hardware and software combination niosII. Great for beginners reference. In Quartu
qdr2_sram
- qdr2 sram 在altera 平台上的实际使用-qdr2 sram platform in the actual use of altera
GPS
- 详细研究了GPS信号捕获跟踪技术，并进行了FPGA设计.是学习GPS系统很好的资料。 -A detailed study of the GPS signal acquisition and tracking technology, and conducted a FPGA design. Is to learn from a very good GPS system information.
uart
- 这是一个串口通讯模块，从串口接收14个数据后用于计算并将计算结果从串口发送出去，里面包含testbench。-This is a serial communication module 14 the serial port to receive data used to calculate the results and sent the serial port, which contains the testbench.