资源列表
IEEE-Std-1800-2012-SystemVerilog
- IEEE Std 1800-2012 SystemVerilog - Unified Hardware Design, Specification, and Verification Language
cyclone5_handbook
- Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements and the increasing bandwidth requirements for high-volume and cost-sensitive applications. The Cyclone V de
Serial12212
- 基于串口的PFGA 任意脉冲发生器，非常方便的，可以直接用于工程的代码-Based on the serial PFGA arbitrary pulse generator, very convenient, can be directly used for the project code
DE2_70_TV
- YUV 信号转化为RGB 色彩信号。采用SDRAN, 将色差信号转化为为电视VGA信号。-yuv signal convert to RGB signal
VHDL
- vhdl表示与综合，原书第二版，中文版，比较全，用超星打开-vhdl
DK-ECP3-SERDES-010
- 为verilog 的SERDES 使用程序。可以实现高速串行接口数据通信，时钟还原。-Verilog program for the use of the SERDES. For high-speed serial interface data communications, clock restoration.
s2
- ad9708与ad9280的程序，ad采集进来再da输出，在中间可以自行加一些算法。-ad9708 and ad9280 programs, ad collection come again da output, in the middle of some of the algorithms can add their own.
Modsim-AND-testbench
- 关于fpga中，测试平台testbench的技巧，及仿真软件MOSIDISIM-About fpga skills test platform testbench, and simulation software MOSIDISIM
Square-wave-generator
- 能过通过PC上的串口发送数据去控制FPGA引脚输出方波的频率，占空比！-This program can be had through the serial port on the PC to send data to the control FPGA pin output square wave frequency, duty cycle!
61EDA_C2187
- Xilinx fpga 设计培训中文教程 xlinx环境下的-Xilinx fpga design training tutorial xlinx environment in Chinese
xunji
- 电子设计 循迹小车的基本资料以及如何去实现小车的循迹。-Car electronics design tracking basic information and how to implement car tracking.
XilinxFpgaDesignAndTest
- Xilinx fpga 设计培训中文教程,比较好的学习FPGA入门的教程