资源列表
fft_test
- ALTERA的FFT IP核时序的仿真，verilog语言。采用burst方式，FFT点数2048点-FFT IP core of timing simulation ALTERA, verilog language. Using burst mode, FFT points 2048 points
YJ_EP4
- 与Cpress CY8013所对应的 FPGA端的开发 使用NIOSII NIOSII 连续往USB FIFO 端点里灌数据 上位机不断的接收 陪和我的上位程序可以达到30Mbyte/s 需要上位机程序的去搜索TestUSBSpeedMFCNovember -upload-And Cpress CY8013 corresponding end FPGA development using NIOSII NIOSII continuous irrigation to USB FIFO
FPGA
- 这些课件可以作为对FPGA有兴趣的人学习的入门资料，包含EDA的概述、FPGA结构与配置、VHDL语言、QuartusII软件、SOPC和NIosII嵌入式处理器设计、DSP Builder系统设计工具等内容-These courseware on the FPGA can be used as those who are interested in learning introductory information, including EDA overview, FPGA structure
Dac_spi
- spi dac for artix7 vivado
S3_WAVE
- 1、本实验模拟正弦函数发生器 2、使用逻辑分析仪查看波形 3、/proj/simulation目录中可以在modelsim中仿真-1, the experimental simulation of the sine function generator, logic analyzer view waveform 3/proj/simulation directory in modelsim simulation
wgy_o1
- 抗干扰接收机程序，包括解调与抗干扰算法-Anti-jamming receiver program
spartan_labview_2009_driver
- The LabVIEW FPGA for SPARTAN 3E XUP driver was developed to enable educators to use LabVIEW FPGA to teach digital and embedded design concepts. This driver is for educational use and cannot be used on custom FPGA hardware.
cn
- Multiprogramming winder river
intel fpga user manual
- quartus 官方使用手册，intelFPGA,原ALTERAFPGA(The official manual,the Intel fpga user manual)
Dm9000a_Init
- DM9000网口通信芯片控制模块，基于FPGA的控制模块，实现初始化，数据发送接收-The DM9000 network port communications chip control module, FPGA-based control module initialization, sending and receiving data
FIr
- 非常全面的滤波器资料，相信对滤波器设计很有帮助-The filter is very comprehensive information, I believe very helpful filter design
BitHound_SP601_1.0_
- 逻辑分析仪器代码，VHDL实现，支持100M采样速度-Logic analysis instrumentation code, VHDL implementation, support 100M sampling rate