资源列表
Ethernet
- 简易以太网测试仪包含fifo缓冲模块，crc校验模块，检测和检测模块等(Simplified Ethernet Tester: including fifo modular, crc modular, check modular etc.)
基于VHDL的UART控制器设计
- UART模块的VHDL语言设计(Design of VHDL language based on UART module)
eeprom1
- I2C功能模块的verilog实现，转载的(I2C function module Verilog implementation, reproduced)
Verilog数字系统设计教程(第二版)夏宇闻
- Verilog学习基础书籍，推荐其第四部分作为手册查阅(Verilog based learning books, recommended the fourth part as handbooks)
LED
- 按键控制数码管显示，从0到9显示，八位数码管(Button control digital tube display)
I2C-verilog-(非常详细的i2c学习心得)
- i2c学习心得，详细的I2C VERILOG实现代码(i2c learning experience, detailed I2C VERILOG implementation code)
the example of FPGA principle and application
- 该文件为特权同学FPGA开发板打造的同步练习，里面有详细的例程和操作步骤。(The document for the privileged students FPGA development board to create synchronized exercises, which have detailed routines and steps.)
Dm9000aep_Protocol
- 基于DM9000AEP的网络协议，Dm9000aep_Protocol.v(DM9000AEP based network protocol,Dm9000aep_Protocol.v)
FPGA与SPI接口程序(hdl源代码)
- FPGA,VERILOG,SPI串口通信；(FPGA,VERILOG,SPI;;;;;;;;;)
div
- 运用verilog语言实现将频率分为二倍的作用。(two divided-frequency)
step_motor
- 2相混合式步进电机驱动程序，配套MC860H驱动器，共阴极接法 EN提前DIR至少5us，正常工作为高电平 DIR提前PUL下降沿5us确定其状态高或底，DIR 高：正转，底：反转 PUL脉冲信号，高电平不小于2.5us，低电平不小于2.5us(2 phase hybrid stepper motor driver, matching MC860H driver, common cathode connection method.EN advance DIR at least 5us, n
VCS
- vcs介绍使用方法 介绍如何具体使用synopsys公司的软件(VCs describes the use of the method)