资源列表
py2cmod-0.1.2.tar
- this is a scoerboarding algorithm
ece385sp16_lab4_adders
- 加法器, 三种加法器的实现。不同的逻辑速度和逻辑结构(adders, three types of them)
fpga
- 简单的键盘输入，点阵，数码管以及LCD显示(imple dot matrix, digital tube and LCD display)
dizi
- 实现一个根据摁健实现开孔闭孔的电子竖笛，有一个开机音乐且可以在8*8点阵中显示开孔闭孔情况，从低音5到高音5均可实现(To achieve a healthy implementation of electronic press according to the opening of the obturator.)
pll
- 三相锁相环，应用于电力电子控制，锁相相位角用于3/2变换等(Three phase phase-locked loop is used in power electronic control, phase-locked phase angle is used for 3/2 transformation, etc.)
PI
- PID调节器，非常好用的PID调节器模块(PID regulator, very easy to use PID regulator module)
asyn_fifo
- 异步fifo,异步的先进先出，verliog hdl代码，已经经过调试(Asynchronous fifo, asynchronous first out, verliog HDL code, has been debugged)
ldpc_encoder_802_3an
- ldpc_encoder for 802.3an
Verilog_traffic
- 若农场路无车辆，则在高速路保持绿灯。在探测农场路有车辆，高速路上的交通灯应由绿到黄，再到红，并允许农场路方向灯变绿，绿灯亮一段时间，由绿变黄再到红。(If there is no vehicle on the farm road, keep the green light on the highway. There are vehicles on the farm road, the traffic lights on the high speed road should be green to
夏宇闻-Verilog经典教程
- verilog经典教程，对于新手有很大的帮助(Verilog classic tutorials, a great help for beginners)
CRC
- 4G-LTE标准中turbo编码所用到的CRC编码，绝对可用！(CRC encoding turbo encoding used in 4G-LTE standard)
usb_rd_buffer
- FPGA（SPARTAN6）通过USB协议与开发板上的USB芯片进行数据读写测试，在上位机上可以看到USB发来的数据，也可以通过修改VERILOG代码完成数据的接收(FPGA (SPARTAN6) can read and write data through the USB chip on the development board through the USB protocol. The data sent by USB can be seen on the host computer,