资源列表
verilog_curr_design
- 基于Verilog的乒乓球游戏机,由按键代替发接球(Table tennis game machine based on Verilog language, using the buttons to serve and catch..)
Digital_clock
- 教程 基于FPGA的智能闹钟,控制NOKIA5110(Intelligent alarm clock based on FPGA, control N O K I A 5110)
cordic
- 使用verlog语音实现cordic 算法,在DE2 115平台上已验证。(Implementation cordic algorithm)
DDS波形发生器
- DDS波形生成器verilog语言书写(FPGA型号cy4以上)(DDS generate verilog)
seq
- 实现序列检测功能,新手编程,已经在modelsim里检验过了功能完整,内附模块化testbench(Sequence detection function, novice programming)
08_lwip
- zynq7000 下 lwip例程,经过测试,好用(zynq7000 lwip program)
svpwm_full_nios
- 实现verilog的svpwm 对于算法开发有很好的帮助。。希望大家多多学习了。(Implementation of verilog svpwm for the development of the algorithm has a very good help. The I hope you learn a lot.)
USB2.0的IP核(详细verilog源码和文档)
- USB2.0的IP核开发.代码可以直接使用已经验证过(USB2.0 IP kernel development. Code can be used directly, has been verified)
mian
- 系统上电后,数码管低五位显示00000,按下PLUSE按键,显示数值加1(After power on, the digital tube is low, five shows 00000, press the PLUSE button, display the value plus 1)
led_test
- 实现流水灯的控制verilog程序,源程序vivado 2015.4(Achieve water light control, Verilog procedures)
CANNY
- 对特定图片进行canny边缘检测。首先是高斯模糊,然后sobel算子处理,再局部极大值确定,最后阈值判断。(Canny edge detection for a particular picture. The first is the Gauss fuzzy, and then the Sobel operator is processed, and then the local maximum is determined, and finally the threshold is judged
FIR滤波器
- STM32f407 DSP库应用 FIR滤波器 用示波器测试PA8,可以测出1Khz的正弦波。如果不是,修改PWM参数,使其正好为1Khz.(STM32f407 DSP library uses FIR filter Oscilloscope PA8 test, you can measure the sine wave of 1Khz. If not, modify the PWM parameter to make it exactly 1Khz.)