资源列表
shift_split_data
- 关于一个串行数据输入 根据时序将数据分两路输出的程序 -on a serial data input timing will be based on output data using two procedures
sineROM
- 自己写得一个关于sine(32X24)的程序-own written on a sine (32X24) procedures
sf_2006421154739
- 关于两种实现pwm的方法 基于51单片机设计-on two methods to achieve PWM 51 microcontroller-based design
moto2
- 使用CPLD进行驱动电机演示,使用硬件编程语言,适合初学者-use of motor-driven CPLD for a demonstration of the use of hardware programming language, suitable for beginners
electric_bell
- 电子打铃器 在max plus 2 下编译通过-electronic bell playing for the max plus 2 under through compiler
8051IP 核源代码(VHDL)
- 8051IP 核源代码-8051IP nuclear source code
51单片机实现PC键盘
- 8051IP 核源代码(VHDL).RAR-8051IP nuclear source code (VHDL). RAR
电梯控制电路
- 电梯控制电路,用verilog写-elevator control circuit used to write Verilog
微处理机接口电路设计
- 微处理机接口电路设计,用verilog写-microprocessor interface circuit design, writing Verilog
16-bit数的偶数奇偶校验
- 16-bit数的偶数奇偶校验及阶乘运算,用verilog写-16-bit number of even parity and factorial computation, written using Verilog
存储器模型及测试台
- 512x8存储器模型,及其测试台,用verilog写-512x8 memory model, and the tester, using Verilog write
latch
- 门拴电路,4位选择器,alu,用verilog写的。-doors Shuan circuit, four selectors, ALU, with Verilog writes.