资源列表
fraq
- 基于VHDL语言的频率计具有高速计频，体积小的特点-based on VHDL or with the frequency or high frequency, small size characteristics
two_d_fir
- FIR FILTER verilog code-FIR FILTER Verilog code
ASIC_TFT
- 彩色TFT液晶显示控制电路设计及其ASIC实现-color TFT LCD control circuit design and ASIC implementation
pro001_buzzer
- 使用FPGA控制蜂鸣器的程序,用Verilog HDL设计,可以是蜂鸣器发出各种不同的声音-FPGA use buzzer control procedures, using Verilog HDL design, it is the buzzer sounded different voices
seg_led_rtl
- 使用FPGA控制数码管,在数码管上动态的显示数字,很使用,可以直接作为其他模块的子模块,直接调用-FPGA use of digital control in the digital tube dynamic display figures that use, direct module as other sub-module, called directly
VgaChinese
- 在显示器上显示汉字,在FPGA上实现,使用Verilog HDL 设计,完全可是直接使用-on display in Chinese characters, achieving the FPGA, using Verilog HDL design, However, the use of direct completely
keyboard_ps2_verilog
- 键盘鼠标的原代码,用FPGA实现,使用Verilog HDL编写,已经使用FPGA验正过了,完全可以用-keyboard and mouse of the original code, using FPGA, using Verilog HDL preparation, already in use FPGA-mortem is over, it can be used
CPLD_CODE12
- 最后一个了，其他的未经验证，以后验证成功后再上传-final one, the other is untested and proved to be successful, then later upload
CPLD_CODE1
- ju继续上载CPLD的黄金参考源代码，希望对电子爱好者有所帮助-ju continue on the CPLD gold reference source, and I hope to help e-lovers
CPLD_CODE
- 收集的CPLD_FPGA很好的代码，无论是对初学者还是大侠高手都很有参考价值-collected CPLD_FPGA good code, both heroes for beginners or experts are useful references
VHDLTest_us
- 你会做这些题吗？这是来自国外的测试题-you do that? This is a test from abroad that!
ev-usbSIE
- ev-usbSIE VHDL编写的USB程序-ev-usbSIE VHDL procedures prepared by the USB