搜索资源列表
RS232_VHDL
- FPGA控制RS232来实现串口通信，非常好的串口程序。-FPGA control RS232 serial communication to achieve very good serial procedures.
VerilogUart
- UART 串口通信模块，Verilog 实现。已在Microsemi Actel FPGA A3PE1500 硬件验证通过。-UART serial communication module, Verilog implementation. Verified by Microsemi Actel FPGA A3PE1500 hardware.
CoreUartTest
- Actel FPGA UART 串口通信模块，调用Actel CoreUART IP核实现。已在Microsemi Actel FPGA A3PE1500 硬件验证通过。-Actel FPGA UART serial communication module, call Actel CoreUART IP core implementation. Verified by Microsemi Actel FPGA A3PE1500 hardware.
bldc_motor_control_design_example
- 无刷直流电机 VHDL VERILOG 控制,速度环，RS232 串口接收发送 始终分频 PWM生成 电机相序 actel FPGA使用-VERILOG BLDC control of the use of actel FPGA- actel VERILOG BLDC control of the use of actel FPGA
FPGA_verilog_uart-
- 基于 FPGA器件设计实现UART的波特率产生器、UART发送器和接收器及其整合电路,，利用Veriolog-HDL语言对这三个功能模块进行描述并加以整合，通过ModelSim仿真，用串口调试程序进行验证，最终实现一个通用异步收发器的设计。-UART baudrate generator, transmitter and receiver and its integrated circuit are implemented by FPGA device. Using Veriolog-HDL d
uart_rx
- FPGA实现串口接收功能 Verilog语言-Serial reception FPGA Verilog language
uart_tx
- FPGA实现串口发送 Verilog 语言-Serial reception FPGA Verilog language.
uart
- fpga 实现串口功能,收发功能可以都实现。很适合学习- uart
asyn_fifo2
- 采用Verilog语言，使用FPGA内部IP核FIFO模块，实现串口的传输-Using Verilog language, the use of FPGA IP core internal FIFO module, serial data transmission
232controlsend
- 通过串口发送帧命令来控制FPGA发送429信号，并通过429板卡接收验证。-Through the serial port to send the command to control the FPGA send 429 signal, and through the verification of the board.
232controlrecieve
- 通过串口发送帧命令控制FPGA接收429板卡发送的信号，并点亮相应LED。-Through the serial port to send the command to send the FPGA to receive the 429 card board to send the signal, and light up the corresponding LED.
232control429
- 通过串口发送不同的帧命令控制FPGA分别发送和接收429信号。-Send and receive 429 signals through the serial port to send different frame command control FPGA.
RS485
- verilog开发FPGA，实现RS485串口通信-RS485 driver for FPGA
scope_new
- 本实验，为 ZX-2 开发板的综合实验，该实验利用 ZX-2 开发板上的 ADC、独 立按键、 UART 等外设， 搭建了一个具备丰富功能的数据采集卡， ZX-2 开发板负 责进行数据的采集并将数据通过串口发送到 PC 机上， PC 端，利用强大的串口调 试工具——串口猎人，来实现数据的接收分析，并将数据分别以波形、码表、柱 状图的形式动态显示出来，以让使用者能够直观的看到 ADC 采集到的信号细节。 同时，用户也可以使用串口猎人通过串口给下位机（ FPGA） 发送指令，下位
18_uart
- FPGA的串口程序,有串口控制器，串口发送，串口接收模块和顶层测试 模块等。-verilog code about the FPGA uart module.
uart_lcd_display_XUP
- Uart串口通信程序，PC机向FPGA的串口发送数据，FPGA的串口收到数据后回传到PC机，同时显示在lcd屏。-Uart serial communication program: The serial port of PC sends data to the FPGA. After the serial port of FPGA receives the data, FPGA sends the received data back to the PC, simultaneously dis
picturefo-COM
- 串口看图软件,C++,VS2010,适用FPGA图像开发上位机显示-picture in show for COM
uart_tras
- FPGA编写的串口发送程序，调试通过，分模块实现。-FPGA prepared by the serial transmission program, debugging through, sub-modules.
TCD1304_drive
- FPGA驱动TCD1304AP线阵CCD，并经采集将数据通过串口传输至上位机-FPGA drives TCD1304AP linear CCD, and by collecting the data transmitted through the first bit machine serial
COM_REV
- 基于FPGA的串口接收程序,标准通用的串口接收程序-FPGA-based receiver program