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09_uart2
- FPGA UART与计算机pc进行串口通信Verilog程序，含有波特率选择，发送器，接收机以及顶层文件，再PC机上通过串口调试助手与FPGA进行通信。-FPGA UART
source
- 使用EP4CE15F17型号的FPGA芯片做的串口协议，使用Verilog HDL完成描述，通过仿真和实验证明功能完好。-FPGA chip using EP4CE15F17 models do serial protocol, using Verilog HDL to complete the descr iption, the simulations and experiments show that function well.
uart_verilog
- 用verilog实现串口通信，实现串口的接收及发送。-Using Verilog serial communication, the realization of sending and receiving serial.
UART
- Verilog语言实现的串口程序，能够烧到开发板上，并与PC连接，通过串口调试助手能够在PC上看到效果。亲测可用-Verilog language serial program that can burn the development board and connected to the PC, to see the effect on the PC via the serial port debugging assistant. Pro-test available
FPGA_Uart_Verilog-
- Verilog HDL编程，实现FPGA串口通信，实验报告含代码和原理-Verilog HDL programming, FPGA serial communication, test reports containing the code and principles
UART
- 已经过调试成功的fpga串口模块，verilog编写-Has been successful commissioning of fpga serial module, verilog write
UART_FPGA
- 可以多波特率设置，奇偶校验可以设置，verilog编写，经过调试成功的串口模块-Baud rate settings can be more, parity can be set, verilog written after the successful commissioning of the serial module
S18_UART_IN_HDL
- 带mif文件的，串口模块，verilog编写，经过检验的。-With mif files, serial module, verilog written proven.
uart_8
- 用verilog描述的串口通信接口，主体为接收机和发送机两个模块-Serial communication interface with Verilog descr iption, subject to a receiver and transmitter module two
uart_an_jian
- verilog描述的串口，能够接收数据，发送数据采用按键触发-Verilog descr iption of the serial port, receive data, send data using the trigger button
TX
- 串口发送控制程序！在一帧的发送下，经过串口协议编写的硬件描述语言verilog！-Serial transmission control program!
ps2scan
- 采用VERILOG的CPLD编程，通过ps2接收键盘数据，然后把接收到的字母A到Z键值转换相应的ASII码，通过串口发送到PC机上。 -Using VERILOG CPLD programming, through the PS2 receive keyboard data, and then receive the letters A to Z key transformation corresponding ASII code, through the serial port to se
ad_rx_module
- 基于verilog的串口通信接收部分代码，欢迎下载交流！-Receiving part of the code verilog based serial communication, welcome to download the exchange!
FPGA_UART
- 在Verilog环境下，实现多个串口的功能，支持波特率，数据位，停止位可设。-In Verilog environment, to achieve multiple serial ports, support for baud rate, data bits, stop bits can be set.
UART01
- 可靠的FPGA串口收发程序，用Verilog编写，可以自行调整波特率！-Reliable FPGA serial transceiver procedures, with Verilog prepared to adjust the baud rate themselves!
FPGA--uart
- FPGA串口通信源码,通过Verilog来实现功能，新手可以参考下-FPGA uart
uart_tx
- 带有奇偶校验功能的的串口发送模块，实现uart功能。verilog硬件描述语言实现-With the function of parity of serial port to send module, uart functions.Verilog hardware descr iption language to realize
serial_Verilog
- 特权同学的串口通信程序，Verilog语言，FPGA开发学习源码-Serial communication program, privileged students Verilog language, FPGA development learning source
uart_tx
- 用Verilog实现通过上位机向串口发送多帧数据，并具有抗噪功能-Implementation serial port receive more frame data by software use Verilog, and has the function of the resist noise
232
- FPGA中实现232串口数据的发送，采用Verilog语言编辑，简单方便，易理解-FPGA to realize sending 232 data, using Verilog language editing, simple, easy to understand