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uart16550
- uart16550 is a 16550 compatible (mostly) UART core. The bus interface is WISHBONE SoC bus Rev. B. Features all the standard options of the 16550 UART: FIFO based operation, interrupt requests and other. The datasheet can b
uart
- uart协议、实现、验证，基于wishbone协议，工业标准为16550A-UART protocol, implementation, verification, based on the Wishbone protocol, the industry standard for the 16550A
uart16750_latest.tar
- Implements a 16550/16750 UART core
uart16550_latest[1].tar
- 开源UART IP核16550，该IP核兼容16550 UART，具有Modem功能，完全可编程的串行接口具有可设置的字符长度、奇偶校验、停止位以及波特率生成器。-Open-source UART IP core 16550, the IP core is compatible with 16550 UART, with Modem function, fully programmable serial interface can be set up with a character lengt
a_vhd_16550_uart_latest.tar
- 16550 uart vhdl source code
uartic
- 16550 datasheet for vhdl design
a_vhd_16550_uart
- 兼容16550 uart，使用fpga实现，支持多平台-Compatible with 16550 uart, use fpga implementation, multi-platform support
a_vhd_16550_uart_latest.tar
- 实现通用16550的uart的功能模块，使用vhdl编程语言。-16550 uart achieve universal functional modules using vhdl programming language.