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an485_design_example
- AN485_CH-MAX II CPLD 中的串行外设接口主机（verilog SPI）
SPI_IIC_design_example
- ALTERA原厂提供的例程，网上很难找到的，在MAX2系列芯片上实现过，VHDL和VERILOG两种语言编写 IIC读写程序-ALTERA provided the original routine, it is difficult to find online and in the MAX2 series chip-off, VHDL and VERILOG two languages
get_6675_temp_2
- MAXII 240 CPLD和6675 开发的0-1023.75度的温度传感数据采集系统，用seg7 LED显示，精度0.25度。探头是K型测温线，Quartus II 6.0调是通过，在cpld开发板上面试验成功-MAXII 240cpld and 0-1023.75 development of 6675 degrees C temperature sensor data acquisition system, using seg7 LED shows that the accuracy o
lunwen
- spi协议简介及简单的spi接口的描述和基于CoolRunner CPLD 的SPI设计结构-Introduction and simple protocol spi spi interface descr iption of the SPI CoolRunner CPLD-based design structure
an487_CN
- 利用 MAX II CPLD 实现 SPI至I 2S 的接口-used the MAX II CPLD to implement the SPI interface with I2C
SPI_to_I2C
- 本设计允许用户使用CPLD作为SPI和I2C接口的桥接芯片。-This design enables an SPI-interface-equipped host to control data flow to other devices such as an A/D converter, LED controller, audio processor to read temperature sensors, hardware monitors, and diagnostic senso
SPIADC
- 单片机读取通过cpld读取spi信息的例子，需要配合响应的cpld运行！-spi comment
LED
- DSP的SPI工作原理DSP，CPLD，74HC595（串入并出的移位器），共阳数码管。SPIMOSI和 SPICLK直接从DSPJIE接到了74HC595的SER和SRCLK，作为数据和时钟信 号的输入，SPICS由CPLD引出来控制74HC595的选通。-DSP SPI works DSP, the CPLD, 74HC595 (string in and out of the shifter), Yang digital tube. The SPICLK SPIMOSI and d
Bspii_masttera
- 一种基于CPLD/FPGA的的SPI控制的IP核的实现spi -Based on CPLD/FPGA IP core SPI control realize spi
xapp386
- This document details the VHDL implementation of a Serial Peripheral Interface (SPI) master in a Xilinx® CoolRunner™ -II CPLD. CoolRunner-II CPLDs are the lowest power CPLDs available, making this the perfect target device for an SPI Mas
xapp348
- This document details the VHDL implementation of a Serial Peripheral Interface (SPI) master in a Xilinx CoolRunner™ XPLA3 CPLD.-This document details the VHDL implementation of a Serial Peripheral Interface (SPI) master in a Xilinx CoolRunne
SPItoIICcodeForAlteraCPLD
- Altera 官方关于SPI和I2C应用的CPLD实现的例子-About SPI and I2C official Altera s CPLD implementation examples of applications
vhdlthreelinespi
- ＳＰＩ总线与ＣＰＬＤ之间的通信程序，可实现ＳＰＩ串行输入，通过移位寄存器后并行输出-SPI bus and the CPLD communication between these procedures is to realize SPI serial input, through the shift register parallel output after
spi1
- 使用verilog语言编写的实现cpld EPM570与EEPROM的SPI通信-Using verilog language to achieve cpld EPM570 SPI communication with the EEPROM
SPISlavetoPWMGeneration-Source.ZIP
- SPI convert to PWM for CPLd
receive_spi
- verilog语言SPI通信，可用于CPLD以及FPGA-Verilog language SPI communications, can be used for CPLD and FPGA
tinycpufiles
- TinyCPU源码,使用Verilog编写的资源占用极少的CPU。Quartus工程，可跑在Altera MAXII CPLD上,也很方便移植到其他FPGA上。CPU使用200个逻辑单元，外设(SPI,LCD等)使用180个逻辑单元。 内含汇编编译器源码(VC2008)，可编译CPU对应的汇编文件。-The sourcecode of TinyCPU, which only consumed very few logical cells, written by Verilog. It is