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erweiDCT
- 用 FPGA实现了二维离散余弦变换和逆变换，结构设计采用行列分解法，乘法器采用移位求和的方法实现，并且采用流水线结构设计，提高处理核的性能-Using FPGA to achieve the two-dimensional discrete cosine transform and inverse transform, the structural design of the use of the ranks of decomposition, the sum of multipliers us
jiafaqi
- EDA条件下乘法器的实现。AHDL语言实现输入显示乘法等功能-EDA under the conditions of the realization of multipliers. AHDL language features such as input showed that multiplication
PLLpostprocesser
- this the phase locked loops post processer.PLLs are widely used in frequency synthesis, for frequency multipliers and dividers, for carrier and symbol synchronization, and in the implementation of coherent receivers-this is the phase locked loops pos
FIR_csd_mul
- 采用CSD编码的常系数乘法器的FIR滤波器的设计。-CSD-coded using constant coefficient multipliers of the FIR filter design.
lagrange-multiplier
- Larange Multipliers-Larange Multipliers...........
ga
- 电路演化，可以生成一个两位乘两位的乘法器-Circuits have evolved to generate a two by two multipliers
multi_4
- 自己用写的VHDL的四位乘法器，实现方式比较简单-Write the VHDL four multipliers to achieve relatively simple way
EDA
- EDA课程设计，设计的四位乘法器，原理，仿真结果及其原程序。-EDA curriculum design, the design of the four multipliers, the principle of simulation results and its original program.
coding
- 数字通信系统设计上机实验题，二分频，全加器，乘法器，四选一选择器-Digital communication system design on the experimental questions, divide, full adders, multipliers, four elected a selector
booth_multiplie_module
- 利用verilog实现的Booth算法乘法器，对想学习乘法器的将会有很大的帮助.-Booth algorithm verilog realization use multipliers, the multiplier will want to learn a great help.
VMD_1D
- Spectrum-based decomposition of a 1D input signal into k band-separated modes. Here, we propose an entirely non-recursive variational mode decomposition model, where the modes are extracted concurrently. The model looks for an ensemble of modes and t
code
- Due to its high modularity and carry-free addition, a redundant binary (RB) representation can be used when designing high performance multipliers. The conventional RB multiplier requires an additional RB partial product (RBPP) row, because an err
Meher_2014.pdf.tar
- his work describes an approximate DCT architec- ture for the High Efficiency Video Coding (HEVC) standard. Since the standard requires to support multiple block sizes, architectures based on exact implementation require a relevant amount of hardw
ADMM
- 无线通信资源管理中的ADMM算法，ADMM( Alternating Direction Method of Multipliers) 算法是机器学习中比较广泛使用的约束问题最优化方法，它是ALM算法的一种延伸(Alternating Direction Method of Multipliers)