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verilog tutorial
- verilog实例教程
16QAM_verilog 使用Verilog实现全数字的16QAM调制器
- 使用Verilog实现全数字的16QAM调制器，假设载波的频率为1MHz，数据比特率为100kbit/s.包括源代码和testbench-use verilog to realize 16qam,carrier frequency is 1MHz,data rate is 100kbit/s.including source code and testbench
GPS
- 用verilog 编写的gps系统调制解调器，很大很实用-Gps system prepared with verilog modem, very very useful
QPSKmodulationanddemodulation
- 这是一个QPSK比较完整的FPGA工程，是用Verilog语言写的，主要包括调制解调模块。-This is a QPSK FPGA project is written in Verilog language, including the modem module.
verilog_UART_100MHZ
- 自己写的verilog UART程序，前仿真后仿真，下到板子里都对，ISE的-Verilog UART write your own program, before simulation after simulation, are right next to the plate yard, ISE' s
fft3780
- DTMB GB20600-2006 中国地面数字电视标准 3780点IFFT verilog 源代码-DTMB GB20600-2006 terrestrial digital TV standard 3780-point IFFT verilog source code
Verilog
- 直方图均衡化处理，基于FPGA, verilog语言-Histogram equalization, based on FPGA, Verilog language
VITERBI
- In this case is a viterbi algorithm code for decoding the convolutional code, using verilog HDL language. This code provide the method of deconvolution of the convolutional code
BPSK_mod_vhdl
- Binary Phase Shift Keying modulator and demodulator coding using verilog hardware descr iption language