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Verilog&Vhdl混语言对SDRAM的控制源代码
- Verilog&Vhdl混语言对SDRAM的控制源代码，提供了很好的例子，顶层文件为sdrm.v！-VerilogVhdl mixed language SDRAM control of the source code, provided a good example of top-level documents sdrm.v!
FPGA_DDR-SDRAM
- FPGA对SDRAM的控制，有部分源码，-FPGA SDRAM control, part of the source,...
FPGA_SDRAM_PCI
- 一个基于FPGA的PCI数据采集程序，包括SDRAM控制，PCI9054时序控制，开发语言verilog，开发环境quartus-FPGA-based PCI data acquisition procedures, including SDRAM control, PCI9054 timing control, the development of language verilog, development environment quartusII
SDRAM-control
- SDRAM控制器的Verilog源代码，主要用于SDR-SDRAM-SDRAM controller
sdram-control-verilog
- SDRAM控制器源码，内含完整的控制器verilog源代码和测试代码，超值哈。-This readme file for the SDR SDRAM Controller includes information that was not incorporated into the SDR SDRAM Controller White Paper v1.1.
DDR_SDRAM
- ddr sdram 的控制程序，lattice的，比较好用的，大家-ddr sdram control program, lattice, and relatively easy to use, and we look
IR_PEN
- infra pen controller, cmos sensor control and sdram control
SDRAMHDL
- SDRAM基础性控制核 很有用的 VHDL状态机实现-SDRAM control of the nuclear basic useful VHDL state machine implementation
SDRAM
- 这个是一个基于FPGA的SDRAM控制器系统，实现对SDRAM的读写操作，用来实现时序的控制-This is an FPGA-based SDRAM controller system, the read and write operations to SDRAM to achieve the control of timing
sdram
- 程序说明: 本次实验控制开发板上面的SDRAM完成读写功能。 先向SDRAM里面写数据，然后再将数据读出来做比较，如果不匹配就通过LED变亮显示出来，如果一致，LED就不亮。 part1是使用Modelsim仿真的工程 part2是在开发斑上面验证的工程 目录说明: part1: part1_32是4m32SDRAM的仿真工程 part1_16是4m16SDRAM的仿真工程 \model文件夹里面是仿真模型 \rtl文件夹里面是源文件 \sim文
Sdram_Control_2Port
- 双端口SDRAM控制器，将SDRAM虚拟成两个端口，已经在ALTER DE2开发板的硬件上验证通过，采用Verilog HDL语言编写。-Dual-port SDRAM controller, SDRAM virtual into two ports, have ALTER DE2 development board hardware verification by using the Verilog HDL language.
SDRAM
- 对SDRAM的介绍非常详细，里面有很多对SDRAM的程序控制模块的设计。-Very detailed presentation on the SDRAM, which has many of the SDRAM of the process control module.
SDRAM
- 非常简单好用的SDRAM控制器，使初学者更加容易理解SDRAM的控制的操作，在Quatrtus环境中验证没问题。-SDRAM controller is very simple and easy to make it easier for beginners to understand the operation of the control of SDRAM, the environment in Quatrtus verify no problem.
FPGA-SDRAM-control-code
- 该程序是FPGA控制DDR SRAM的控制源代码，使得SDRAM的控制变得简单。-This program is DDR SDRAM control code ,it makes the operation of SDRAM more easy.
SDRAM-verilog
- SDRAM读写控制的实现与Modelsim仿真-verilog-SDRAM read and write control to achieve with the Modelsim simulation-verilog
SDRAM_TEST
- SDRAM控制代码，已经在开发板上测试通过。-SDRAM control code has been tested on the development board.
sdram_hr_hw_4port
- FPGA控制SDRAM的源程序,SDRAM控制起来比较麻烦,时序复杂,本程序将其封装了一个模块,可以方便地调用.-FPGA to control the source of SDRAM, SDRAM control is too much trouble, the timing complexity of the procedure to package a module, you can easily call.
sdram
- 在ISE环境中，利用verilog语言编写的SDRAM的控制，已经通过功能仿真，其中PLL部分并没有加入，使用时可以自行加入PLL模块。-Verilog language in the ISE environment, the use of SDRAM control, through functional simulation, which the PLL part and did not join, can join the PLL blocks.
SDRAM-control-SOPC
- sdram 控制器的sopc搭建 sdram 控制器的sopc搭建 -sdram controller the sopc build sdram controller sopc structures the
sdram
- sdram的控制程序，以及相关的testbench(sdram control module)