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200652519182195904
- 介绍了vhdl语言的知识,包括元件,加法器,计数器等的编程-introduced VHDL language knowledge, including components, Adder, counters and other programming
IIR_FILTER
- 无限冲击响应滤波器（ llR ）算法 由于系统对序列施加的算法，是由加法、延时和常系数乘三种基本运算的组合，所以可以用不同结构的数字滤波器来实现而不影响系统总的传输函数。-Infinite impulse response filter (llR) algorithm because the system imposed on the sequence of algorithms, are by adder, delay and the constant coefficients by a
add32
- 16位DSPTMS320F2407实现32位加法源程序-16 DSPTMS320F2407 source 32-bit adder
quanjiaqiheDchufaqi
- 设计一个全加器元件，再用该元件连成4位二进制加法器 设计一个D触发器元件，再用该元件连成4位寄存器 -Design a full adder component, then the component with a 4-bit binary adder design a D flip-flop element, then the components together into four registers
3.1.2-c_add
- C语言实现加法计算，DSP程序代码，包含链接文件以及库文件等等。 -C language realization of the adder computing, DSP code, include linked files and library files.
book3e
- 数字信号处理的FPGA实现随书光盘，包含大量Verilog代码，包括加法器，乘法器以及FIR滤波器设计，快速傅立叶变换-FPGA digital signal processing to achieve the CD with the book, contains a large amount of Verilog code, including the adder, multiplier and FIR filter design, fast Fu Liye transform