搜索资源列表
HDL
- 窜行数据检测器,用于检测一列数据中的特殊字符串-Channeling line data detector for detecting a specific string of data in
hello
- 完成字符串“HELLO”逐个左移位循环与右移位循环的设计与下载。-To complete the string "HELLO" Design and download one by one left shift cycle and right shift cycle.
UARTtest1
- 一个单片机与电脑通信的程序,可以相互之间发送字符串-a program that realize the function of communication between mcu and pc
USBUART0
- c8051f350的串口通信程序,发送单个字符串-c8051f350 serial communication program, send a single string
shutan
- demo1-LampsSequencer 以流水灯方式点亮板上的8颗LED demo2-seg1 7段数码管以计时方式显示 demo3-seg2 7段数码管显示01234567 demo4-keyled1 按键控制板上LED灯的亮来 demo5-charlcd1 在字符液晶屏上显示汉字 demo6-BEEP 蜂鸣器演奏音乐 demo7-uart 串口输出字符串 demo8-ps2_1 在数码管上显示PS2按键的值 demo9-vgaout1 在V
I2C
- 关于24序列I2C操作,能直接操作字符串哦!-About 24 sequences I2C operation can directly manipulate the string Oh!
a-to-A
- 将字符串转换为ASICII,用于FPGA码表-from strings to ASICII
lcd_driver
- 在1602液晶模块上显示字符串,其中第一行显示“Welcom to hx" 在第二行显示“www.mcuhx.com- in 1602 LCD module display on a string, including the first line shows "Welcom to hx" In the second row shows "www.mcuhx.com
lcd
- FPGA对液晶屏写控制字,并在液晶屏上显示一个字符串This is a test -FPGA control word written on the LCD screen, and displayed on the LCD screen a string This is a test
uart_verilog
- Verilog HDL语言编写的uart程序,在别人基础上改动和优化完成,quartus ii 10.0编译通过,可综合,板上仿真通过。将PC机发送的字符串发送回,可一次发送多个字符串。-Verilog HDL language uart program, in others on the basis of changes and optimization is complete, quartus ii 10.0 compiler, integrated, on-board through si
VHDLRS232Slave
- 本模块的功能是验证实现和PC机进行基本的串口通信的功能。需要在PC机上安装一个串口调试工具来验证程序的功能。程序实现了一个收发一帧10个bit(即无奇偶校验位)的串口控 //制器,10个bit是1位起始位,8个数据位,1个结束 //位。串口的波特律由程序中定义的div_par参数决定,更改该参数可以实 //现相应的波特率。程序当前设定的div_par 的值是0x145,对应的波特率是 //9600。用一个8倍波特率的时钟将发送或接受每一位bit的周期时间 //划分为8个时隙以
LCD1602_Verilog
- 实现字符串的显示,左右移动,换行等操作。-to show string,and move from left to right ,changeline.
uart_fifo
- 带fifo的串口通信verilog设计,该设计为学习uart所用,完成PC端发送至fpga后fpga原数据返回,支持长字符串。-Serial communication with fifo verilog design, which is used to learn uart complete PC sends data back to the original post fpga fpga, support long strings.
verilog_DATA_displays
- 使用verilog语言,滚动显示“verilog”字符串程序代码及相关说明-Using verilog language, scrolling display " verilog" string code and instructions
huffman
- 用verilog硬件语言实现了动态huffman编码,能够压缩字符串文件,展示了硬件的压缩率-Using verilog hardware descr iption language to achieve a dynamic huffman coding to compress the string file, showing the hardware compression rate
rx_tx_demo
- 用verilog实现的少量字符串的连续收发,添加了FIFO模块,稍微修改下就可以使用。-Receive a small amount of a continuous string of verilog implementation, added FIFO module, can be used under slightly modified.
hello
- FPGA最基础实验程序,编程实现向计算机发送“HELLO”字符串-FPGA most basic experimental procedures, programming sending " HELLO" string to the computer
TX_RX
- FPGA用verilog实现串口和电脑的字符串以及单字符精准无误通信,即通过电脑向FPGA发送任一长度数据,FPGA返回PC相同的数据。波特率为9600,本例程为了得到精准的波特率使用了50M时钟的3倍频,测试可用,如有不明的地方,可以给我留言-FPGA implementation using verilog string and the computer serial port and single-character accurate communication, 9600, FPGA u
blowfish
- Blowfish算法是一个64位分组及可变密钥长度的对称密钥分组密码算法,可用来加密64比特长度的字符串。32位处理器诞生后,Blowfish算法因其在加密速度上超越了DES而引起人们的关注。Blowfish算法具有加密速度快、紧凑、密钥长度可变、可免费使用等特点,已被广泛使用于众多加密软件。 -Blowfish is a keyed, symmetric cryptographic block cipher designed by Bruce Schneier in 1993 and pl
LCD1602
- LCD1602液晶 用VHDL语言写的显示字符串-LCD1602 LCD with VHDL language to write the display string