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clock
- 实验3设计资料简易时钟 FPGA数字时钟设计参考资料及全部代码-Experimental design simple clock FPGA digital clock design reference information and all the code
Clock-experiment
- 数字时钟程序，亲自在实验室做过这个实验，实验成功。-Digital clock program, personally done this experiment in the laboratory, the experiment was a success.
jing
- 用VHDL语言编程一个具有秒计时，定时的数字时钟，其中包括程序，图示，仿真结果及报告。-VHDL programming a stopwatch, digital clock timing, including procedures, icon, simulation results and reports.
SCAN_LED
- 基于FPGA的数字时钟设计，数码管显示，简单易懂，适合初学者-FPGA-based digital clock design, digital display, easy to understand for beginners
ep1c6_15_clock
- 基于FPGA的数字时钟，可实现自动计时，秒表等功能，适合于基础学习，欢迎大家下载-FPGA-based digital clock, automatic chronograph, stopwatch function, suitable for basic learning, welcome to download
clock
- 一个简单的数字时钟Verilog仿真程序，60秒1分钟，60分一小时，24小时一天，265天一年。代码逻辑简化不含状态机，易理解。附激励文件可直接仿真。-A simple digital clock Verilog simulation program 60 seconds, 1 minute, 60 hours, 24 hours a day, 265 days a year. The code logic simplifies excluding state machine, easy to
shuzishizong
- 通过按键实现数字时钟的时间调节和 闹钟调节 -Digital clock alarm clock is adjustable
Digital_Clock
- FPGA数字时钟完美通过测试。目标板是ZRTECH的EP2C5T144C8 CORE2-5U核心板及PERI1-8KD配套子卡。-The FPGA digital clock perfect pass the test. The target board is ZRTECH EP2C5T144C8 CORE2-5U core board and PERI1-8KD supporting daughter card.
hsk4571_clock
- 数字时钟 VHDL实现，可调节时分秒，在QUATTUS||9.0下编写，可在9.0及以上版本运行并下载，芯片为Altera的Cyclone3 EP3C8T1-Digital clock VHDL realization, minutes and seconds can be adjusted in QUATTUS | | 9.0 under preparation, can be run in the 9.0 and above versions and download, chips for
1123212
- 用VHDL写的一个数字时钟程序，调试成功-Use VHDL to write a digital clock procedures, debugging success
digital-timer
- 数字时钟的verilog代码，以仿真编译通过，可直接用-Digital clock verilog code which is compiled and simulated and can be directly used
Digital-clock
- 数字时钟6位数码管显示。主要器件为74ls48和74ls160 /74ls161。功能：1.显示时、分、秒。2. 可以24小时制或12小时制。3. 具有校时功能-Digital clock six digital tube display. Main components of 74ls48 and 74ls160/74ls161. Features: 1. Shows hours, minutes, seconds. (2) a 24-hour or 12-hour clock. 3 a sc
CLOCK
- 数字时钟的实现，能够显示时间，包括时，分，秒的信息。-The realization of the digital clock that can display time, including hours, minutes and seconds of information.
clock
- 基于VHDL的数字时钟设计，能很好的模拟数字时钟显示-VHDL-based digital clock design, can be a good analog and digital clock display
shizhong_xianshi
- 使用Altera型FPGA的数字时钟，使用按键显示，具有调时计时功能-Using Altera FPGA-based digital clock, using the key display, with timing function when adjusting
clock
- 基于vhdl的数字时钟，可以定时报警，可以调分钟，小时-Based vhdl digital clock, timer alarm, you can tune in minutes, hours
FPGA-verilog-digital-clock
- FPGAverilog数字时钟,基于quartal ii 下的数字时钟电路程序-FPGA verilog digital clock
VHDL-based-digital-clock-programming
- 基于VHDL的数字时钟设计，可以调时间，并且可以设置四个闹钟时间，中和很多VHDL的基本程序，对初学者很有用-VHDL-based digital clock design, you can adjust the time, and you can set four alarm time, and in a lot of VHDL basic procedures, useful for beginners
8
- VHDL实验的程序，数字时钟，进行分秒计时，用数码管显示-VHDL experimental procedures, digital clock, for every minute timer with digital display
21_ds1302
- 基于FPGA与DS1302时钟芯片采用Verilog HDL语言编写的数字时钟实现-Based on FPGA and DS1302 clock chip using Verilog HDL language of the digital clock to achieve