搜索资源列表
3des_vhdl
- 3重DES（3DES）加密算法的问答及其VHDL实现。
LIP1601CORE_des_3des
- DES & 3DES VHDL & Verilog code
simple_3DES
- 精简3DES加解密算法实现，该3DES加解/密系统以精简硬件结构为目标，与传统的以吞吐率为目标的流水线模式3DES加/解密系统相比，具有消耗硬件资源小，性价比突出的优点。-reduced 3DES algorithm system based on FPGA
3des_vhdl_latest
- 3DES的VHDL IP核，64位 标准FIPS 46-3 NIST,并且使用3组64位密钥-The VHDL implementation 3DES，The core complies with the Triple-DES 64-bit block cipher defined in FIPS 46-3 NIST standard and operates with three 64-bit keys. Functional Descr
des_3
- 对于3DES加密解密算法的verilog实现，已经得到测试通过，对于学习3DES加密解密的实现过程很有用-3DES encryption and decryption algorithms for the verilog implementation has been tested for learning the implementation of 3DES encryption and decryption process is useful
3des_vhdl_latest.tar
- DES/3DES open core used VHDL. 在实际系统中使用过，完美无缺。-DES/3DES open core used VHDL. Used in the actual system, perfect.
des3
- 3des的Verilog代码（已编译，可直接使用）-3des Verilog code (compiled, and can be used directly)
15_IP_core
- ata, 3des vgs等ip核。 ECE395 GPU: -ata, 3des vgs and other ip core. ECE395 GPU:
3des_vhdl
- 3DES VHDL SOURCE CODE