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zishiyingfenpin
- 我的学习经验，一种自适应分频及分频方法的实现，很好用的哦-my learning experience, an adaptive frequency-frequency method and the realization of the good, oh
verilog-som
- 拿verilog编写的som(自适应神经网络算法)，用于障碍物检测，基于FPGA可综合实验，已经在altera的cylcone上实现-Canal verilog prepared som (adaptive neural network algorithm) for obstacle detection. Based on FPGA synthesis experiments, in altera achieve the cylcone
autofir
- 自适应滤波器设计的仿真程序，完全用C语言编写，可以作为滤波器设计的参考。原为VHDL实验要求的程序。-adaptive filter design simulation program, complete with C language can be used as filter design reference. VHDL to the original requirements of the experimental procedures.
hssdrc_latest.tar.gz
- HSSDRC IP core is the configurable universal SDRAM controller with adaptive bank control and adaptive command pipeline. HSSDRC IP core and IP core testbench has been written on SystemVerilog and has been tested in Modelsim. HSSDRC IP core is li
uart.rar
- 带自适应波特率发生器UART实现，经过FPGA验证的！,UART baud rate generator with adaptive realization, after FPGA validation!
基于FPGA的自适应数字频率计
- 基于FPGA的自适应数字频率计，测量范围1Hz-99.9MHz,FPGA-based adaptive digital frequency meter, measuring range 1Hz-99.9MHz
LMS-vhdl-coad-
- 基于quartus的LMS 自适应滤波器代码，适合初学者 -The LMS adaptive filter based on quartus code, suitable for beginners
fir_lms
- 基于FPGA的自适应滤波器的实现。采用Verilog编程，2阶滤波器。-FPGA-based realization of the adaptive filter. Using Verilog programming, 2-order filter.
Verilog_SOM
- Verilog编写的SOM(自适应神经网络算法)-Verilog written SOM (self-adaptive neural network algorithm)
ADAPTIVEFILTER
- 采用vhdl代码描述自适应滤波器，具有很好的可参考性，和实用性-Vhdl code to describe the use of adaptive filter, can be found with a good nature and usefulness of
AnEfficientDouble-FilterHardwareArchitectureforH.2
- 在此提出了一種新穎的硬體結構 實時執行的自適應去塊效應 過濾過程中指定的H.264/AVC視頻編碼 標準。-In this paper,a novel hardware architecture for real-time implementation of the adaptive deblocking filtering process specified by the H.264/AVC video coding standard, is presented.The deb
8Adaptive_filters
- adaptive filter basics and implementation in vhdl
QAM16_demo
- This a demonstration for 16QAM. It is a Simulink model, including hardware implementation on Xilinx FPGA for adaptive equalizer and carrier recovery. -This is a demonstration for 16QAM. It is a Simulink model, including hardware implementation on Xil
ofdmbaseband
- the OFDM PHY is adaptive therefore it supports multiple schemes BPSK, QPSK, 16-QAM and 64-QAM for data carriers’ modulation. The constellation diagrams are gray mapped and shows the magnitudes I and Q (In-phase and Quadrature) components of e
fir_lms
- verilog语言编写LMS（最小均方误差）自适应滤波器。-verilog language LMS (least mean square error) adaptive filter.
Adaptive-echo-cancellation
- 自适应回波消除，FPGA方面的设计论文，对大家有用的可以下下来-Adaptive echo cancellation, FPGA design aspects of paper, can be useful to all of us look down under
MODELSYS
- 用verilog编写的运动自适应去隔行算法 表扩边缘检测 sad最小值编写-Verilog written with motion-adaptive deinterlacing algorithm detects the edge of the table to expand the minimum write sad
fir_lms-adaptive-filter
- 采用VHDL语言编写的fir级联结构的LMS自适应滤波器，方便学习研究自适应滤波器有关参数实际实现的影响-Using VHDL language fir cascade structure of LMS adaptive filter, adaptive filter to facilitate study and research the impact of the actual implementation of the relevant parameters
Adaptive-filter
- 一种LMS数字自适应滤波器的硬件设计与应用-Adaptive filter