搜索资源列表
_3_rider_led
- 3 rider_led verilog实例3跑马灯 (1)源文件 rider_led.v (2)管脚分配 pins list.txt -3 rider_led 跑马灯 (1)源文件 rider_led.v (2)管脚分配 pins list.txt
_4_water_led
- verilog实例4 water_led 流水灯 (1)源文件 water_led.v (2)管脚分配 pins list.txt -4 water_led 流水灯 (1)源文件 water_led.v (2)管脚分配 pins list.txt
_5_key_led_without_debounce
- verilog实例5 key_led_without_debounce 使用KEY控制LED亮灭,无按键消抖 (1)源文件 key_led.v (2)管脚分配 pins list.txt -5 key_led_without_debounce 使用KEY控制LED亮灭,无按键消抖 (1)源文件 key_led.v (2)管脚分配 pins list.txt
DE2_70_pin_assignments
- DE2-70开发板中附带的引脚的分配列表,格式为.csv的-DE2-70 development board comes with the pin assignment list, in the format. Csv
ps2_keyboard
- VErilog编写的PS2键盘读写源码 模块端口的列表: clk, reset, ps2_clk, ps2_data, rx_extended, rx_released, rx_shift_key_on, rx_scan_code, rx_ascii, rx_data_ready, // rx_read_o rx_read, // rx_read_ack_i tx_data, tx_write, tx_wr
simple_spi
- 广泛使用的spi总线描述,里面详细的列出了其协议,以及相应的verilog代码实现-Spi bus descr iption widely used, which is a detailed list of their agreement, and the corresponding verilog code implementation
NAND_flash_verilog_vhdl
- 很好的NAND Flash 硬件驱动语言,支持VHDL和verilog 语言方便移植,如果有想用FPGA直接驱动NAND flash而又不知如何下手的朋友肯定喜欢。- NAND Flash Controller Reference Design =============================================================================== File List 1.
TLB
- 用verilog语言实现了快速线性列表的查找,程序实现了一个基本框架,下载下来可以添加新内容-Using verilog language to achieve a fast linear list to find the program implements a basic framework, you can add new content downloaded
guibing
- 该设计采用VHDL语言将五个数的从大到小排序,采用的方法是归并插入排序算法。该算法能在最少比较次数(七次)情况下排列出五个数的大小顺序。-This design using VHDL language will be ordered five digits from big to small, the method is to merge insertion sort algorithm. The proposed algorithm can at least compare (seven) i
Example-b8-4
- ModelSim的波形比较的功能可以将当前仿真与一个参考数据(WLF文件)进行比较,比较的结果可以在波形窗口或者列表窗口中查看-Comparison of the ModelSim wave functions , compare the results can be viewed on the waveform window or the list window
cyclone_ivProgramming-Guide
- 本应用笔记提供了一组简单易用的指南和一列在Cyclone® IV 设计中需要考虑的因素。 Altera 建议在设计过程中遵循本应用笔记中介绍的指南-This application note provides a set of simple and easy to use guidelines and a list of needs to be considered in the Cyclone IV design factors. Altera is recommended t
dianzhen
- 需要实现点阵按列依次并且循环显示的效果,可以分析视觉上可以观察到列的变化,则列的扫描频率必定要远远小于行扫描的频率。在程序中,设置行扫描的频率等于前次实验中数码管扫描的频率,设置列扫描的频率为5HZ,即每0.2s显示亮的一列向前推进一列。在程序中,使用16进制计数作为74HC154的输入:分出5hz的频率,并用其计数,将计数值作为74HC154,则其译码产生的输出变化也为5hz,并且实现每列一次选通。由于每行对应的数码管共阳极。直接赋高电平。则可以实现所需要的功能。行扫面则是要实现先依行点亮,
CMI
- CMI编码原理图,可以通过对m5随即序列进行编码和解码(CMI is designed for m5 random list, which is should in the project, and it can decode it and get the original m5 list)
0011.DBCONN
- File list(Click to check if it's the file you need, and recomment it at the bottom):
VLSI_IEEE_2016_List
- VHDL IEEE 2016,2017 Project List
XC6SLX9 Mini Board Documents
- spartan 6 fpga custom board schematic and component list