搜索资源列表
iNEMO-UART-Output
- 意法半导体的惯性传感器套件iNEMO通过串口数据数据的固件，通过J-LINK下载至开发板-iNEMO Toolkit firmwire by ST Ltd. (Data output from UART)
nios-uart
- 基于nios ii uart 驱动 带接收和发送缓冲区 很少的改动可以任意添加多个串口-Based on nios ii uart driving belt can transmit and receive buffer rarely changes can be more than add a serial port
UART
- 异步串口收发程序，波特率4800。VHDL写成。在ALTERA开发板上测试成功。-This is a UART program, with a fixed 4800bps. Tested successfully on an Altera divice.
UART
- uart code with testing the waveform
demo7-uart
- FPGA EP2C5的串口代码，FPGA新手学习的很基础的代码-about the FPGA IC:EP2C5 uart code.it is use for the fresh one.
UART
- UART串口通信协议的verilog代码-Verilog code of UART serial communication protocol
uart
- uart代码在FPGA开发板与电脑之间上实现其功能-uart code between the FPGA development board and computer
UART
- verilog写的串口程序，其功能完全最正确，带工程文件-verilog to write the serial program, its function is completely the right, with the project file
UART
- sep4020开发板uart模块的驱动程序，使用串口0，在串口调试助手上显示prochip-uart driver module development board sep4020, serial 0, serial debugging assistant prochip
Uart
- UART source code in verilog
UART
- verilog实现UART，分模块实现，希望对大家有所帮助-verilog-- UART
UART-and-FPGA
- 基于FPGA的UART通信控制器 设计与实现持。用到modelsim6.1f环境模拟。-UART communication controller based on FPGA Design and Implementation of hold. Used modelsim6.1f environment simulation.
Code-UART
- code deverloper uart core
uart
- verilog uart串口通讯程序设计 带个模块详细设计 及说明文档-Verilog the uart serial communication program design with the detailed design and documentation of a module
arm-uart-pro
- arm uart实验指导书，实用的基础教程实验
uart-of-fpga
- FPGA实现UART通信程序，verilog hdl语言实现的，好用-UART of FPGA
UART-RS232
- 用verilog语言描述了uart串口通信实验-Verilog language descr iption of the uart serial communication experiment
uart
- verilog VHDL实现的DE2 uart-Verilog VHDL the uart of the DE2
UART
- 基于FPGA的（Universal Asynchronous Receiver Transmitter，UART）串行通信设计论文-FPGA BASIC FOR （Universal Asynchronous Receiver Transmitter，UART）
altera-uart
- ALTERA UART sopc 软核的VHDL描述-ALTERA UART VHDL DESCRIBE