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verilog--uart
- verilog实现uart功能的FPGA应用,适用于Cyclone 2系列-verilog uart function of FPGA applications in the Cyclone Series
uart
- uart的vhdl源码,实现fpga的通用串行异步收发接口的设计-the uart the vhdl source to achieve fpga universal serial asynchronous transceiver interface design
uart
- 用VHDL实现UART通讯(暂时只能发送)-UART communication using VHDL (temporarily only send)
uart-vhdl
- 不错的uart总线程序,已经测试过,没有问题啊-Good uart bus program, has been tested, there is no problem ah
UART
- UART发送数据 中断接受数据 UART发送数据 中断接受数据-UART interrupt receive UART transmit data
verilog
- verilog HDL 入门学习的源代码。 包括双向语法,计数器,状态机,锁存器,uart等-Introduction to learning verilog HDL source code. Including two-way grammar, counters, state machines, latches, uart, etc.
UART
- 1.UART是一个UART的IP核,在其它的程序中可以直接的调用的,波特率是9600.-Is 1.UART a UART IP core can directly call the other program, the baud rate is 9600.
uart
- uart串口通讯,波特率任意可调,采用vhdl语言编写,ise和quartus均可使用-uart serial communication baud rate of any adjustable
uart
- 一个在Quartus 12.0 Web版下做的Uart收发例子,具备基本的收发功能。-Uart transceivers example, with a in Quartus 12.0 Web version under the basic functions of the transceiver.
UART-application
- uart核应用的各种介绍 让大家了解到一些基础的知识 总结的很全面 适合初学者-Uart nuclear application of various introduce let everybody understand to some basic knowledge of very comprehensive summary for beginners
UART-based-on-FPGA
- UART的FPGA的实现,有工程和设计文档说明-FPGA implementation of the UART, engineering and design documentation for instructions
UART-VHDL-QUARTUS
- uart vhdl quartus for altera
uart
- veilog 实现FPGA的串口收发器,自发自收,稍作修改可以用于单独发送和接收模块。-verilog describe uart
uart-code-(Verilog)
- uart 源码 Verilog CPLD -uart code Verilog CPLD
uart
- uart veilog源码 含有testbench-uart verilog
uart
- Verilog 编写全双工UART input clk, // 这个模块的主时钟 input rst, // 同步复位信号 input rx, // 串口接收端口 output tx, // 串口发射端口 input transmit, // 发送信号 input [7:0] tx_byte, // 发送的字节 output received, // 表明,已接受到一个字节 output [7:0] rx_
UART-SPI-I2C-VGA
- 里面有i2c,uart,spi的代码,也是从别的地方下的觉得还不错,,与大家分享一下,做个参考-I2c, uart, spi code inside, but also from elsewhere feel pretty good, and we share with you, to be a reference
uart
- UART 串口收发程序 VHDL UART 串口收发程序 VHDL-UART serial port transceiver procedures VHDL
SystemC-UART
- 基于SystemC的Uart模型-----文档-SystemC the Uart model of----- document
UART
- 本人觉得还不错的vhdl写的UART程序,验证过。-I feel pretty good vhdl write UART program verified.