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uart.rar
- VHDL语言编写的全功能串口模块（包含DTR，RTS等管脚），在CPLD器件上测试通过,VHDL language, full-featured serial modules (including DTR, RTS pin, etc.), in the CPLD device test
uart8.zip
- 使用Libero提供的异步通信IP核实现UART通信，并附带仿真程序。UART设置为1位开始位，8位数据位，1位停止位，无校验。且UART发送自带2级FIFO缓冲，占用FPGA面积很小。,Libero provided the use of asynchronous communication IP core implementation UART communications, and incidental simulation program. UART is set to 1 to sta
uart_niosII.rar
- 基于FPGA芯片，在Nios II IDE软件的开发环境下写的NIos II 软核uart源代码！,Based on FPGA chip, the Nios II IDE software development environment written in NIos II soft-core uart source code!
uart.rar
- 带自适应波特率发生器UART实现，经过FPGA验证的！,UART baud rate generator with adaptive realization, after FPGA validation!
nios_uart.rar
- nios uart 在开发板上试过的，修改了，希望能有用,nios uart board tried in the development of
UART
- FPGA的UART程序，非常好的，讲解详细，我当初看了好多都看不懂，看了这个以后终于明白-FPGA' s UART program, very good, detailed explanation, I had read a lot have not read, finally realized after reading this
UART
- 利用FPGA接受232芯片的串口数据，可以与PC进行串口通信-FPGA chip using the serial data received 232, serial communication with PC
uart
- 状态机实现的可配置uart模块，经过fpga验证-State machine implementation can be configured to uart module, after verification fpga
uart
- 采用VHDL语言编写的串口驱动程序，已调试通过，能够实现同PC机的数据传输，可读性好，可移植性好-VHDL language using the serial driver has been debugged, to achieve the same PC, the data transmission, readable and portable
uartvhdl
- VHDL语言实现的UART IP核，比较实用-VHDL language to achieve the UART IP core, more practical
FPGA_UART
- 其中讲到的是经典的VHDL的UART设计实例，而且有很详细的解释和分析，适合针对FPGA串口的开发。-Which is referred to the UART VHDL design of the classic examples, and there are detailed explanation and analysis for the serial port for FPGA development.
UART
- AVR单片机串口程序 很好用的串口程序，可以发送16进制和ASC-AVR RS232
zhouligong-LPC17XX-example
- 周立功LPC17XX系列配套例程。包括AD,DAC,EINT.GPDMA.GPIO,I2C.IAP,PWM,QEI,RTC,SPI,SSP,TIMER,UART,储存器加速，掉电唤醒，数字输入，CAN,ETHERNET,USB,I2S例程。是学习 的很好例程，例程很全，很值。-Zhou, who LPC17XX series matching routines. Including AD, DAC, EINT.GPDMA.GPIO, I2C.IAP, PWM, QEI, RTC, SPI, SS
UART
- 语言：verilog语言 功能：通过串口控制模块，实现FPGA与串口 通信。 仿真环境：modelsim 综合环境：quartus -Language: verilog language function: through the serial port control module, FPGA and serial communication. Simulation Environment: modelsim integrated environment: quartu
sopc_uart_rt
- sopc的一个应用例程：应用uart部件搭建的一个sopc系统，调试成功了。包含所有源代码-An application of routine sopc: Application uart component erected a sopc system, commissioning a success. Contains all the source code
uart_vhdl
- 串口通讯的VHDL源码，波特率可自行设置，验证通过。-UART VHDL
uart_EP3C16_FIFO
- Verilog编写的串口RS232收发字符串程序,使用FIFO作为数据缓冲区,有效收发字符串长度为256字节,解决了利用串口调试工具与FPGA通讯只能收发单字节的问题.-Programs for uart/RS232, it can receive and transmit strings.
FPGA_VHDL_code
- FPGA学习非常珍贵的资料，包括USB、UART、I2C、Ethernet、VGA、CAN等总线的VHDL实现，可以直接应用于实际项目中。需要的请下载。 -FPGA to learn very valuable information, including USB, UART, I2C, Ethernet, VGA, CAN bus, such as VHDL to achieve, can be directly applied to actual projects. Need to do
UART
- 用UART实现RS422通信-UART TO RS422
NIOS_UART
- NIOS的UART设计，包括完整的硬件和软件设计-NIOS the UART design, including complete hardware and software design